1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016-2014 Synopsys, Inc. (www.synopsys.com)
7 /include/ "skeleton_hs.dtsi"
10 model = "snps,zebu_hs";
11 compatible = "snps,zebu_hs";
14 interrupt-parent = <&core_intc>;
17 device_type = "memory";
18 reg = <0x80000000 0x20000000>; /* 512 */
22 bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
30 compatible = "simple-bus";
34 /* child and parent address space 1:1 mapped */
39 compatible = "fixed-clock";
40 clock-frequency = <50000000>;
43 core_intc: interrupt-controller {
44 compatible = "snps,archs-intc";
46 #interrupt-cells = <1>;
49 uart0: serial@f0000000 {
50 compatible = "ns8250";
51 reg = <0xf0000000 0x2000>;
53 clock-frequency = <50000000>;
57 no-loopback-test = <1>;
61 compatible = "snps,archs-pct";
62 #interrupt-cells = <1>;
66 virtio0: virtio@f0100000 {
67 compatible = "virtio,mmio";
68 reg = <0xf0100000 0x2000>;
72 virtio1: virtio@f0102000 {
73 compatible = "virtio,mmio";
74 reg = <0xf0102000 0x2000>;
78 virtio2: virtio@f0104000 {
79 compatible = "virtio,mmio";
80 reg = <0xf0104000 0x2000>;
84 virtio3: virtio@f0106000 {
85 compatible = "virtio,mmio";
86 reg = <0xf0106000 0x2000>;
90 virtio4: virtio@f0108000 {
91 compatible = "virtio,mmio";
92 reg = <0xf0108000 0x2000>;