1 // SPDX-License-Identifier: GPL-2.0-only
3 * Support for peripherals on the AXS10x mainboard
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
14 compatible = "simple-bus";
17 ranges = <0x00000000 0x0 0xe0000000 0x10000000>;
18 interrupt-parent = <&mb_intc>;
20 creg_rst: reset-controller@11220 {
21 compatible = "snps,axs10x-reset";
26 i2sclk: i2sclk@100a0 {
27 compatible = "snps,axs10x-i2s-pll-clock";
29 clocks = <&i2spll_clk>;
34 i2spll_clk: i2spll_clk {
35 compatible = "fixed-clock";
36 clock-frequency = <27000000>;
41 compatible = "fixed-clock";
42 clock-frequency = <50000000>;
47 compatible = "fixed-clock";
48 clock-frequency = <50000000>;
53 compatible = "fixed-clock";
55 * DW sdio controller has external ciu clock divider
56 * controlled via register in SDIO IP. It divides
57 * sdio_ref_clk (which comes from CGU) by 16 for
58 * default. So default mmcclk clock (which comes
59 * to sdk_in) is 25000000 Hz.
61 clock-frequency = <25000000>;
67 compatible = "fixed-clock";
68 clock-frequency = <74250000>;
72 gmac: ethernet@18000 {
73 #interrupt-cells = <1>;
74 compatible = "snps,dwmac";
75 reg = < 0x18000 0x2000 >;
77 interrupt-names = "macirq";
80 snps,multicast-filter-bins = <256>;
82 clock-names = "stmmaceth";
84 resets = <&creg_rst 5>;
85 reset-names = "stmmaceth";
86 mac-address = [00 00 00 00 00 00]; /* Filled in by U-Boot */
90 compatible = "generic-ehci";
91 reg = < 0x40000 0x100 >;
96 compatible = "generic-ohci";
97 reg = < 0x60000 0x100 >;
102 * According to DW Mobile Storage databook it is required
103 * to use "Hold Register" if card is enumerated in SDR12 or
106 * Utilization of "Hold Register" is already implemented via
107 * dw_mci_pltfm_prepare_command() which in its turn gets
108 * used through dw_mci_drv_data->prepare_command call-back.
109 * This call-back is used in Altera Socfpga platform and so
110 * we may reuse it saying that we're compatible with their
111 * "altr,socfpga-dw-mshc".
113 * Most probably "Hold Register" utilization is platform-
114 * independent requirement which means that single unified
115 * "snps,dw-mshc" should be enough for all users of DW MMC once
116 * dw_mci_pltfm_prepare_command() is used in generic platform
120 compatible = "altr,socfpga-dw-mshc";
121 reg = < 0x15000 0x400 >;
123 card-detect-delay = < 200 >;
124 clocks = <&apbclk>, <&mmcclk>;
125 clock-names = "biu", "ciu";
131 compatible = "snps,dw-apb-uart";
132 reg = <0x20000 0x100>;
133 clock-frequency = <33333333>;
141 compatible = "snps,dw-apb-uart";
142 reg = <0x21000 0x100>;
143 clock-frequency = <33333333>;
150 /* UART muxed with USB data port (ttyS3) */
152 compatible = "snps,dw-apb-uart";
153 reg = <0x22000 0x100>;
154 clock-frequency = <33333333>;
162 compatible = "snps,designware-i2c";
163 reg = <0x1d000 0x100>;
164 clock-frequency = <400000>;
170 compatible = "snps,designware-i2s";
171 reg = <0x1e000 0x100>;
172 clocks = <&i2sclk 0>;
173 clock-names = "i2sclk";
175 #sound-dai-cells = <0>;
179 compatible = "snps,designware-i2c";
180 #address-cells = <1>;
182 reg = <0x1f000 0x100>;
183 clock-frequency = <400000>;
188 compatible="adi,adv7511";
191 adi,input-depth = <8>;
192 adi,input-colorspace = "rgb";
193 adi,input-clock = "1x";
194 adi,clock-delay = <0x03>;
195 #sound-dai-cells = <0>;
198 #address-cells = <1>;
204 adv7511_input:endpoint {
205 remote-endpoint = <&pgu_output>;
212 adv7511_output: endpoint {
213 remote-endpoint = <&hdmi_connector_in>;
220 compatible = "atmel,24c01";
226 compatible = "atmel,24c04";
233 compatible = "hdmi-connector";
236 hdmi_connector_in: endpoint {
237 remote-endpoint = <&adv7511_output>;
243 compatible = "snps,dw-apb-gpio";
244 reg = <0x13000 0x1000>;
245 #address-cells = <1>;
248 gpio0_banka: gpio-controller@0 {
249 compatible = "snps,dw-apb-gpio-port";
252 snps,nr-gpios = <32>;
256 gpio0_bankb: gpio-controller@1 {
257 compatible = "snps,dw-apb-gpio-port";
264 gpio0_bankc: gpio-controller@2 {
265 compatible = "snps,dw-apb-gpio-port";
274 compatible = "snps,dw-apb-gpio";
275 reg = <0x14000 0x1000>;
276 #address-cells = <1>;
279 gpio1_banka: gpio-controller@0 {
280 compatible = "snps,dw-apb-gpio-port";
283 snps,nr-gpios = <30>;
287 gpio1_bankb: gpio-controller@1 {
288 compatible = "snps,dw-apb-gpio-port";
291 snps,nr-gpios = <10>;
295 gpio1_bankc: gpio-controller@2 {
296 compatible = "snps,dw-apb-gpio-port";
305 compatible = "snps,arcpgu";
306 reg = <0x17000 0x400>;
307 encoder-slave = <&adv7511>;
309 clock-names = "pxlclk";
310 memory-region = <&frame_buffer>;
312 pgu_output: endpoint {
313 remote-endpoint = <&adv7511_input>;
319 compatible = "simple-audio-card";
320 simple-audio-card,name = "AXS10x HDMI Audio";
321 simple-audio-card,format = "i2s";
322 simple-audio-card,cpu {
325 simple-audio-card,codec {
326 sound-dai = <&adv7511>;