arch/alpha/kernel/traps.c

   1 /*
   2  * arch/alpha/kernel/traps.c
   3  *
   4  * (C) Copyright 1994 Linus Torvalds
   5  */
   6
   7 /*
   8  * This file initializes the trap entry points
   9  */
  10
  11 #include <linux/jiffies.h>
  12 #include <linux/mm.h>
  13 #include <linux/sched.h>
  14 #include <linux/tty.h>
  15 #include <linux/delay.h>
  16 #include <linux/module.h>
  17 #include <linux/kallsyms.h>
  18 #include <linux/ratelimit.h>
  19
  20 #include <asm/gentrap.h>
  21 #include <asm/uaccess.h>
  22 #include <asm/unaligned.h>
  23 #include <asm/sysinfo.h>
  24 #include <asm/hwrpb.h>
  25 #include <asm/mmu_context.h>
  26 #include <asm/special_insns.h>
  27
  28 #include "proto.h"
  29
  30 /* Work-around for some SRMs which mishandle opDEC faults.  */
  31
  32 static int opDEC_fix;
  33
  34 static void
  35 opDEC_check(void)
  36 {
  37         __asm__ __volatile__ (
  38         /* Load the address of... */
  39         "       br      $16, 1f\n"
  40         /* A stub instruction fault handler.  Just add 4 to the
  41            pc and continue.  */
  42         "       ldq     $16, 8($sp)\n"
  43         "       addq    $16, 4, $16\n"
  44         "       stq     $16, 8($sp)\n"
  45         "       call_pal %[rti]\n"
  46         /* Install the instruction fault handler.  */
  47         "1:     lda     $17, 3\n"
  48         "       call_pal %[wrent]\n"
  49         /* With that in place, the fault from the round-to-minf fp
  50            insn will arrive either at the "lda 4" insn (bad) or one
  51            past that (good).  This places the correct fixup in %0.  */
  52         "       lda %[fix], 0\n"
  53         "       cvttq/svm $f31,$f31\n"
  54         "       lda %[fix], 4"
  55         : [fix] "=r" (opDEC_fix)
  56         : [rti] "n" (PAL_rti), [wrent] "n" (PAL_wrent)
  57         : "$0", "$1", "$16", "$17", "$22", "$23", "$24", "$25");
  58
  59         if (opDEC_fix)
  60                 printk("opDEC fixup enabled.\n");
  61 }
  62
  63 void
  64 dik_show_regs(struct pt_regs *regs, unsigned long *r9_15)
  65 {
  66         printk("pc = [<%016lx>]  ra = [<%016lx>]  ps = %04lx    %s\n",
  67                regs->pc, regs->r26, regs->ps, print_tainted());
  68         printk("pc is at %pSR\n", (void *)regs->pc);
  69         printk("ra is at %pSR\n", (void *)regs->r26);
  70         printk("v0 = %016lx  t0 = %016lx  t1 = %016lx\n",
  71                regs->r0, regs->r1, regs->r2);
  72         printk("t2 = %016lx  t3 = %016lx  t4 = %016lx\n",
  73                regs->r3, regs->r4, regs->r5);
  74         printk("t5 = %016lx  t6 = %016lx  t7 = %016lx\n",
  75                regs->r6, regs->r7, regs->r8);
  76
  77         if (r9_15) {
  78                 printk("s0 = %016lx  s1 = %016lx  s2 = %016lx\n",
  79                        r9_15[9], r9_15[10], r9_15[11]);
  80                 printk("s3 = %016lx  s4 = %016lx  s5 = %016lx\n",
  81                        r9_15[12], r9_15[13], r9_15[14]);
  82                 printk("s6 = %016lx\n", r9_15[15]);
  83         }
  84
  85         printk("a0 = %016lx  a1 = %016lx  a2 = %016lx\n",
  86                regs->r16, regs->r17, regs->r18);
  87         printk("a3 = %016lx  a4 = %016lx  a5 = %016lx\n",
  88                regs->r19, regs->r20, regs->r21);
  89         printk("t8 = %016lx  t9 = %016lx  t10= %016lx\n",
  90                regs->r22, regs->r23, regs->r24);
  91         printk("t11= %016lx  pv = %016lx  at = %016lx\n",
  92                regs->r25, regs->r27, regs->r28);
  93         printk("gp = %016lx  sp = %p\n", regs->gp, regs+1);
  94 #if 0
  95 __halt();
  96 #endif
  97 }
  98
  99 #if 0
 100 static char * ireg_name[] = {"v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
 101                            "t7", "s0", "s1", "s2", "s3", "s4", "s5", "s6",
 102                            "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
 103                            "t10", "t11", "ra", "pv", "at", "gp", "sp", "zero"};
 104 #endif
 105
 106 static void
 107 dik_show_code(unsigned int *pc)
 108 {
 109         long i;
 110
 111         printk("Code:");
 112         for (i = -6; i < 2; i++) {
 113                 unsigned int insn;
 114                 if (__get_user(insn, (unsigned int __user *)pc + i))
 115                         break;
 116                 printk("%c%08x%c", i ? ' ' : '<', insn, i ? ' ' : '>');
 117         }
 118         printk("\n");
 119 }
 120
 121 static void
 122 dik_show_trace(unsigned long *sp)
 123 {
 124         long i = 0;
 125         printk("Trace:\n");
 126         while (0x1ff8 & (unsigned long) sp) {
 127                 extern char _stext[], _etext[];
 128                 unsigned long tmp = *sp;
 129                 sp++;
 130                 if (tmp < (unsigned long) &_stext)
 131                         continue;
 132                 if (tmp >= (unsigned long) &_etext)
 133                         continue;
 134                 printk("[<%lx>] %pSR\n", tmp, (void *)tmp);
 135                 if (i > 40) {
 136                         printk(" ...");
 137                         break;
 138                 }
 139         }
 140         printk("\n");
 141 }
 142
 143 static int kstack_depth_to_print = 24;
 144
 145 void show_stack(struct task_struct *task, unsigned long *sp)
 146 {
 147         unsigned long *stack;
 148         int i;
 149
 150         /*
 151          * debugging aid: "show_stack(NULL);" prints the
 152          * back trace for this cpu.
 153          */
 154         if(sp==NULL)
 155                 sp=(unsigned long*)&sp;
 156
 157         stack = sp;
 158         for(i=0; i < kstack_depth_to_print; i++) {
 159                 if (((long) stack & (THREAD_SIZE-1)) == 0)
 160                         break;
 161                 if ((i % 4) == 0) {
 162                         if (i)
 163                                 pr_cont("\n");
 164                         printk("       ");
 165                 } else {
 166                         pr_cont(" ");
 167                 }
 168                 pr_cont("%016lx", *stack++);
 169         }
 170         pr_cont("\n");
 171         dik_show_trace(sp);
 172 }
 173
 174 void
 175 die_if_kernel(char * str, struct pt_regs *regs, long err, unsigned long *r9_15)
 176 {
 177         if (regs->ps & 8)
 178                 return;
 179 #ifdef CONFIG_SMP
 180         printk("CPU %d ", hard_smp_processor_id());
 181 #endif
 182         printk("%s(%d): %s %ld\n", current->comm, task_pid_nr(current), str, err);
 183         dik_show_regs(regs, r9_15);
 184         add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
 185         dik_show_trace((unsigned long *)(regs+1));
 186         dik_show_code((unsigned int *)regs->pc);
 187
 188         if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) {
 189                 printk("die_if_kernel recursion detected.\n");
 190                 local_irq_enable();
 191                 while (1);
 192         }
 193         do_exit(SIGSEGV);
 194 }
 195
 196 #ifndef CONFIG_MATHEMU
 197 static long dummy_emul(void) { return 0; }
 198 long (*alpha_fp_emul_imprecise)(struct pt_regs *regs, unsigned long writemask)
 199   = (void *)dummy_emul;
 200 long (*alpha_fp_emul) (unsigned long pc)
 201   = (void *)dummy_emul;
 202 #else
 203 long alpha_fp_emul_imprecise(struct pt_regs *regs, unsigned long writemask);
 204 long alpha_fp_emul (unsigned long pc);
 205 #endif
 206
 207 asmlinkage void
 208 do_entArith(unsigned long summary, unsigned long write_mask,
 209             struct pt_regs *regs)
 210 {
 211         long si_code = FPE_FLTINV;
 212         siginfo_t info;
 213
 214         if (summary & 1) {
 215                 /* Software-completion summary bit is set, so try to
 216                    emulate the instruction.  If the processor supports
 217                    precise exceptions, we don't have to search.  */
 218                 if (!amask(AMASK_PRECISE_TRAP))
 219                         si_code = alpha_fp_emul(regs->pc - 4);
 220                 else
 221                         si_code = alpha_fp_emul_imprecise(regs, write_mask);
 222                 if (si_code == 0)
 223                         return;
 224         }
 225         die_if_kernel("Arithmetic fault", regs, 0, NULL);
 226
 227         info.si_signo = SIGFPE;
 228         info.si_errno = 0;
 229         info.si_code = si_code;
 230         info.si_addr = (void __user *) regs->pc;
 231         send_sig_info(SIGFPE, &info, current);
 232 }
 233
 234 asmlinkage void
 235 do_entIF(unsigned long type, struct pt_regs *regs)
 236 {
 237         siginfo_t info;
 238         int signo, code;
 239
 240         if ((regs->ps & ~IPL_MAX) == 0) {
 241                 if (type == 1) {
 242                         const unsigned int *data
 243                           = (const unsigned int *) regs->pc;
 244                         printk("Kernel bug at %s:%d\n",
 245                                (const char *)(data[1] | (long)data[2] << 32),
 246                                data[0]);
 247                 }
 248 #ifdef CONFIG_ALPHA_WTINT
 249                 if (type == 4) {
 250                         /* If CALL_PAL WTINT is totally unsupported by the
 251                            PALcode, e.g. MILO, "emulate" it by overwriting
 252                            the insn.  */
 253                         unsigned int *pinsn
 254                           = (unsigned int *) regs->pc - 1;
 255                         if (*pinsn == PAL_wtint) {
 256                                 *pinsn = 0x47e01400; /* mov 0,$0 */
 257                                 imb();
 258                                 regs->r0 = 0;
 259                                 return;
 260                         }
 261                 }
 262 #endif /* ALPHA_WTINT */
 263                 die_if_kernel((type == 1 ? "Kernel Bug" : "Instruction fault"),
 264                               regs, type, NULL);
 265         }
 266
 267         switch (type) {
 268               case 0: /* breakpoint */
 269                 info.si_signo = SIGTRAP;
 270                 info.si_errno = 0;
 271                 info.si_code = TRAP_BRKPT;
 272                 info.si_trapno = 0;
 273                 info.si_addr = (void __user *) regs->pc;
 274
 275                 if (ptrace_cancel_bpt(current)) {
 276                         regs->pc -= 4;  /* make pc point to former bpt */
 277                 }
 278
 279                 send_sig_info(SIGTRAP, &info, current);
 280                 return;
 281
 282               case 1: /* bugcheck */
 283                 info.si_signo = SIGTRAP;
 284                 info.si_errno = 0;
 285                 info.si_code = __SI_FAULT;
 286                 info.si_addr = (void __user *) regs->pc;
 287                 info.si_trapno = 0;
 288                 send_sig_info(SIGTRAP, &info, current);
 289                 return;
 290
 291               case 2: /* gentrap */
 292                 info.si_addr = (void __user *) regs->pc;
 293                 info.si_trapno = regs->r16;
 294                 switch ((long) regs->r16) {
 295                 case GEN_INTOVF:
 296                         signo = SIGFPE;
 297                         code = FPE_INTOVF;
 298                         break;
 299                 case GEN_INTDIV:
 300                         signo = SIGFPE;
 301                         code = FPE_INTDIV;
 302                         break;
 303                 case GEN_FLTOVF:
 304                         signo = SIGFPE;
 305                         code = FPE_FLTOVF;
 306                         break;
 307                 case GEN_FLTDIV:
 308                         signo = SIGFPE;
 309                         code = FPE_FLTDIV;
 310                         break;
 311                 case GEN_FLTUND:
 312                         signo = SIGFPE;
 313                         code = FPE_FLTUND;
 314                         break;
 315                 case GEN_FLTINV:
 316                         signo = SIGFPE;
 317                         code = FPE_FLTINV;
 318                         break;
 319                 case GEN_FLTINE:
 320                         signo = SIGFPE;
 321                         code = FPE_FLTRES;
 322                         break;
 323                 case GEN_ROPRAND:
 324                         signo = SIGFPE;
 325                         code = __SI_FAULT;
 326                         break;
 327
 328                 case GEN_DECOVF:
 329                 case GEN_DECDIV:
 330                 case GEN_DECINV:
 331                 case GEN_ASSERTERR:
 332                 case GEN_NULPTRERR:
 333                 case GEN_STKOVF:
 334                 case GEN_STRLENERR:
 335                 case GEN_SUBSTRERR:
 336                 case GEN_RANGERR:
 337                 case GEN_SUBRNG:
 338                 case GEN_SUBRNG1:
 339                 case GEN_SUBRNG2:
 340                 case GEN_SUBRNG3:
 341                 case GEN_SUBRNG4:
 342                 case GEN_SUBRNG5:
 343                 case GEN_SUBRNG6:
 344                 case GEN_SUBRNG7:
 345                 default:
 346                         signo = SIGTRAP;
 347                         code = __SI_FAULT;
 348                         break;
 349                 }
 350
 351                 info.si_signo = signo;
 352                 info.si_errno = 0;
 353                 info.si_code = code;
 354                 info.si_addr = (void __user *) regs->pc;
 355                 send_sig_info(signo, &info, current);
 356                 return;
 357
 358               case 4: /* opDEC */
 359                 if (implver() == IMPLVER_EV4) {
 360                         long si_code;
 361
 362                         /* The some versions of SRM do not handle
 363                            the opDEC properly - they return the PC of the
 364                            opDEC fault, not the instruction after as the
 365                            Alpha architecture requires.  Here we fix it up.
 366                            We do this by intentionally causing an opDEC
 367                            fault during the boot sequence and testing if
 368                            we get the correct PC.  If not, we set a flag
 369                            to correct it every time through.  */
 370                         regs->pc += opDEC_fix;
 371
 372                         /* EV4 does not implement anything except normal
 373                            rounding.  Everything else will come here as
 374                            an illegal instruction.  Emulate them.  */
 375                         si_code = alpha_fp_emul(regs->pc - 4);
 376                         if (si_code == 0)
 377                                 return;
 378                         if (si_code > 0) {
 379                                 info.si_signo = SIGFPE;
 380                                 info.si_errno = 0;
 381                                 info.si_code = si_code;
 382                                 info.si_addr = (void __user *) regs->pc;
 383                                 send_sig_info(SIGFPE, &info, current);
 384                                 return;
 385                         }
 386                 }
 387                 break;
 388
 389               case 3: /* FEN fault */
 390                 /* Irritating users can call PAL_clrfen to disable the
 391                    FPU for the process.  The kernel will then trap in
 392                    do_switch_stack and undo_switch_stack when we try
 393                    to save and restore the FP registers.
 394
 395                    Given that GCC by default generates code that uses the
 396                    FP registers, PAL_clrfen is not useful except for DoS
 397                    attacks.  So turn the bleeding FPU back on and be done
 398                    with it.  */
 399                 current_thread_info()->pcb.flags |= 1;
 400                 __reload_thread(&current_thread_info()->pcb);
 401                 return;
 402
 403               case 5: /* illoc */
 404               default: /* unexpected instruction-fault type */
 405                       ;
 406         }
 407
 408         info.si_signo = SIGILL;
 409         info.si_errno = 0;
 410         info.si_code = ILL_ILLOPC;
 411         info.si_addr = (void __user *) regs->pc;
 412         send_sig_info(SIGILL, &info, current);
 413 }
 414
 415 /* There is an ifdef in the PALcode in MILO that enables a
 416    "kernel debugging entry point" as an unprivileged call_pal.
 417
 418    We don't want to have anything to do with it, but unfortunately
 419    several versions of MILO included in distributions have it enabled,
 420    and if we don't put something on the entry point we'll oops.  */
 421
 422 asmlinkage void
 423 do_entDbg(struct pt_regs *regs)
 424 {
 425         siginfo_t info;
 426
 427         die_if_kernel("Instruction fault", regs, 0, NULL);
 428
 429         info.si_signo = SIGILL;
 430         info.si_errno = 0;
 431         info.si_code = ILL_ILLOPC;
 432         info.si_addr = (void __user *) regs->pc;
 433         force_sig_info(SIGILL, &info, current);
 434 }
 435
 436
 437 /*
 438  * entUna has a different register layout to be reasonably simple. It
 439  * needs access to all the integer registers (the kernel doesn't use
 440  * fp-regs), and it needs to have them in order for simpler access.
 441  *
 442  * Due to the non-standard register layout (and because we don't want
 443  * to handle floating-point regs), user-mode unaligned accesses are
 444  * handled separately by do_entUnaUser below.
 445  *
 446  * Oh, btw, we don't handle the "gp" register correctly, but if we fault
 447  * on a gp-register unaligned load/store, something is _very_ wrong
 448  * in the kernel anyway..
 449  */
 450 struct allregs {
 451         unsigned long regs[32];
 452         unsigned long ps, pc, gp, a0, a1, a2;
 453 };
 454
 455 struct unaligned_stat {
 456         unsigned long count, va, pc;
 457 } unaligned[2];
 458
 459
 460 /* Macro for exception fixup code to access integer registers.  */
 461 #define una_reg(r)  (_regs[(r) >= 16 && (r) <= 18 ? (r)+19 : (r)])
 462
 463
 464 asmlinkage void
 465 do_entUna(void * va, unsigned long opcode, unsigned long reg,
 466           struct allregs *regs)
 467 {
 468         long error, tmp1, tmp2, tmp3, tmp4;
 469         unsigned long pc = regs->pc - 4;
 470         unsigned long *_regs = regs->regs;
 471         const struct exception_table_entry *fixup;
 472
 473         unaligned[0].count++;
 474         unaligned[0].va = (unsigned long) va;
 475         unaligned[0].pc = pc;
 476
 477         /* We don't want to use the generic get/put unaligned macros as
 478            we want to trap exceptions.  Only if we actually get an
 479            exception will we decide whether we should have caught it.  */
 480
 481         switch (opcode) {
 482         case 0x0c: /* ldwu */
 483                 __asm__ __volatile__(
 484                 "1:     ldq_u %1,0(%3)\n"
 485                 "2:     ldq_u %2,1(%3)\n"
 486                 "       extwl %1,%3,%1\n"
 487                 "       extwh %2,%3,%2\n"
 488                 "3:\n"
 489                 ".section __ex_table,\"a\"\n"
 490                 "       .long 1b - .\n"
 491                 "       lda %1,3b-1b(%0)\n"
 492                 "       .long 2b - .\n"
 493                 "       lda %2,3b-2b(%0)\n"
 494                 ".previous"
 495                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 496                         : "r"(va), "0"(0));
 497                 if (error)
 498                         goto got_exception;
 499                 una_reg(reg) = tmp1|tmp2;
 500                 return;
 501
 502         case 0x28: /* ldl */
 503                 __asm__ __volatile__(
 504                 "1:     ldq_u %1,0(%3)\n"
 505                 "2:     ldq_u %2,3(%3)\n"
 506                 "       extll %1,%3,%1\n"
 507                 "       extlh %2,%3,%2\n"
 508                 "3:\n"
 509                 ".section __ex_table,\"a\"\n"
 510                 "       .long 1b - .\n"
 511                 "       lda %1,3b-1b(%0)\n"
 512                 "       .long 2b - .\n"
 513                 "       lda %2,3b-2b(%0)\n"
 514                 ".previous"
 515                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 516                         : "r"(va), "0"(0));
 517                 if (error)
 518                         goto got_exception;
 519                 una_reg(reg) = (int)(tmp1|tmp2);
 520                 return;
 521
 522         case 0x29: /* ldq */
 523                 __asm__ __volatile__(
 524                 "1:     ldq_u %1,0(%3)\n"
 525                 "2:     ldq_u %2,7(%3)\n"
 526                 "       extql %1,%3,%1\n"
 527                 "       extqh %2,%3,%2\n"
 528                 "3:\n"
 529                 ".section __ex_table,\"a\"\n"
 530                 "       .long 1b - .\n"
 531                 "       lda %1,3b-1b(%0)\n"
 532                 "       .long 2b - .\n"
 533                 "       lda %2,3b-2b(%0)\n"
 534                 ".previous"
 535                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 536                         : "r"(va), "0"(0));
 537                 if (error)
 538                         goto got_exception;
 539                 una_reg(reg) = tmp1|tmp2;
 540                 return;
 541
 542         /* Note that the store sequences do not indicate that they change
 543            memory because it _should_ be affecting nothing in this context.
 544            (Otherwise we have other, much larger, problems.)  */
 545         case 0x0d: /* stw */
 546                 __asm__ __volatile__(
 547                 "1:     ldq_u %2,1(%5)\n"
 548                 "2:     ldq_u %1,0(%5)\n"
 549                 "       inswh %6,%5,%4\n"
 550                 "       inswl %6,%5,%3\n"
 551                 "       mskwh %2,%5,%2\n"
 552                 "       mskwl %1,%5,%1\n"
 553                 "       or %2,%4,%2\n"
 554                 "       or %1,%3,%1\n"
 555                 "3:     stq_u %2,1(%5)\n"
 556                 "4:     stq_u %1,0(%5)\n"
 557                 "5:\n"
 558                 ".section __ex_table,\"a\"\n"
 559                 "       .long 1b - .\n"
 560                 "       lda %2,5b-1b(%0)\n"
 561                 "       .long 2b - .\n"
 562                 "       lda %1,5b-2b(%0)\n"
 563                 "       .long 3b - .\n"
 564                 "       lda $31,5b-3b(%0)\n"
 565                 "       .long 4b - .\n"
 566                 "       lda $31,5b-4b(%0)\n"
 567                 ".previous"
 568                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 569                           "=&r"(tmp3), "=&r"(tmp4)
 570                         : "r"(va), "r"(una_reg(reg)), "0"(0));
 571                 if (error)
 572                         goto got_exception;
 573                 return;
 574
 575         case 0x2c: /* stl */
 576                 __asm__ __volatile__(
 577                 "1:     ldq_u %2,3(%5)\n"
 578                 "2:     ldq_u %1,0(%5)\n"
 579                 "       inslh %6,%5,%4\n"
 580                 "       insll %6,%5,%3\n"
 581                 "       msklh %2,%5,%2\n"
 582                 "       mskll %1,%5,%1\n"
 583                 "       or %2,%4,%2\n"
 584                 "       or %1,%3,%1\n"
 585                 "3:     stq_u %2,3(%5)\n"
 586                 "4:     stq_u %1,0(%5)\n"
 587                 "5:\n"
 588                 ".section __ex_table,\"a\"\n"
 589                 "       .long 1b - .\n"
 590                 "       lda %2,5b-1b(%0)\n"
 591                 "       .long 2b - .\n"
 592                 "       lda %1,5b-2b(%0)\n"
 593                 "       .long 3b - .\n"
 594                 "       lda $31,5b-3b(%0)\n"
 595                 "       .long 4b - .\n"
 596                 "       lda $31,5b-4b(%0)\n"
 597                 ".previous"
 598                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 599                           "=&r"(tmp3), "=&r"(tmp4)
 600                         : "r"(va), "r"(una_reg(reg)), "0"(0));
 601                 if (error)
 602                         goto got_exception;
 603                 return;
 604
 605         case 0x2d: /* stq */
 606                 __asm__ __volatile__(
 607                 "1:     ldq_u %2,7(%5)\n"
 608                 "2:     ldq_u %1,0(%5)\n"
 609                 "       insqh %6,%5,%4\n"
 610                 "       insql %6,%5,%3\n"
 611                 "       mskqh %2,%5,%2\n"
 612                 "       mskql %1,%5,%1\n"
 613                 "       or %2,%4,%2\n"
 614                 "       or %1,%3,%1\n"
 615                 "3:     stq_u %2,7(%5)\n"
 616                 "4:     stq_u %1,0(%5)\n"
 617                 "5:\n"
 618                 ".section __ex_table,\"a\"\n\t"
 619                 "       .long 1b - .\n"
 620                 "       lda %2,5b-1b(%0)\n"
 621                 "       .long 2b - .\n"
 622                 "       lda %1,5b-2b(%0)\n"
 623                 "       .long 3b - .\n"
 624                 "       lda $31,5b-3b(%0)\n"
 625                 "       .long 4b - .\n"
 626                 "       lda $31,5b-4b(%0)\n"
 627                 ".previous"
 628                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 629                           "=&r"(tmp3), "=&r"(tmp4)
 630                         : "r"(va), "r"(una_reg(reg)), "0"(0));
 631                 if (error)
 632                         goto got_exception;
 633                 return;
 634         }
 635
 636         printk("Bad unaligned kernel access at %016lx: %p %lx %lu\n",
 637                 pc, va, opcode, reg);
 638         do_exit(SIGSEGV);
 639
 640 got_exception:
 641         /* Ok, we caught the exception, but we don't want it.  Is there
 642            someone to pass it along to?  */
 643         if ((fixup = search_exception_tables(pc)) != 0) {
 644                 unsigned long newpc;
 645                 newpc = fixup_exception(una_reg, fixup, pc);
 646
 647                 printk("Forwarding unaligned exception at %lx (%lx)\n",
 648                        pc, newpc);
 649
 650                 regs->pc = newpc;
 651                 return;
 652         }
 653
 654         /*
 655          * Yikes!  No one to forward the exception to.
 656          * Since the registers are in a weird format, dump them ourselves.
 657          */
 658
 659         printk("%s(%d): unhandled unaligned exception\n",
 660                current->comm, task_pid_nr(current));
 661
 662         printk("pc = [<%016lx>]  ra = [<%016lx>]  ps = %04lx\n",
 663                pc, una_reg(26), regs->ps);
 664         printk("r0 = %016lx  r1 = %016lx  r2 = %016lx\n",
 665                una_reg(0), una_reg(1), una_reg(2));
 666         printk("r3 = %016lx  r4 = %016lx  r5 = %016lx\n",
 667                una_reg(3), una_reg(4), una_reg(5));
 668         printk("r6 = %016lx  r7 = %016lx  r8 = %016lx\n",
 669                una_reg(6), una_reg(7), una_reg(8));
 670         printk("r9 = %016lx  r10= %016lx  r11= %016lx\n",
 671                una_reg(9), una_reg(10), una_reg(11));
 672         printk("r12= %016lx  r13= %016lx  r14= %016lx\n",
 673                una_reg(12), una_reg(13), una_reg(14));
 674         printk("r15= %016lx\n", una_reg(15));
 675         printk("r16= %016lx  r17= %016lx  r18= %016lx\n",
 676                una_reg(16), una_reg(17), una_reg(18));
 677         printk("r19= %016lx  r20= %016lx  r21= %016lx\n",
 678                una_reg(19), una_reg(20), una_reg(21));
 679         printk("r22= %016lx  r23= %016lx  r24= %016lx\n",
 680                una_reg(22), una_reg(23), una_reg(24));
 681         printk("r25= %016lx  r27= %016lx  r28= %016lx\n",
 682                una_reg(25), una_reg(27), una_reg(28));
 683         printk("gp = %016lx  sp = %p\n", regs->gp, regs+1);
 684
 685         dik_show_code((unsigned int *)pc);
 686         dik_show_trace((unsigned long *)(regs+1));
 687
 688         if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) {
 689                 printk("die_if_kernel recursion detected.\n");
 690                 local_irq_enable();
 691                 while (1);
 692         }
 693         do_exit(SIGSEGV);
 694 }
 695
 696 /*
 697  * Convert an s-floating point value in memory format to the
 698  * corresponding value in register format.  The exponent
 699  * needs to be remapped to preserve non-finite values
 700  * (infinities, not-a-numbers, denormals).
 701  */
 702 static inline unsigned long
 703 s_mem_to_reg (unsigned long s_mem)
 704 {
 705         unsigned long frac    = (s_mem >>  0) & 0x7fffff;
 706         unsigned long sign    = (s_mem >> 31) & 0x1;
 707         unsigned long exp_msb = (s_mem >> 30) & 0x1;
 708         unsigned long exp_low = (s_mem >> 23) & 0x7f;
 709         unsigned long exp;
 710
 711         exp = (exp_msb << 10) | exp_low;        /* common case */
 712         if (exp_msb) {
 713                 if (exp_low == 0x7f) {
 714                         exp = 0x7ff;
 715                 }
 716         } else {
 717                 if (exp_low == 0x00) {
 718                         exp = 0x000;
 719                 } else {
 720                         exp |= (0x7 << 7);
 721                 }
 722         }
 723         return (sign << 63) | (exp << 52) | (frac << 29);
 724 }
 725
 726 /*
 727  * Convert an s-floating point value in register format to the
 728  * corresponding value in memory format.
 729  */
 730 static inline unsigned long
 731 s_reg_to_mem (unsigned long s_reg)
 732 {
 733         return ((s_reg >> 62) << 30) | ((s_reg << 5) >> 34);
 734 }
 735
 736 /*
 737  * Handle user-level unaligned fault.  Handling user-level unaligned
 738  * faults is *extremely* slow and produces nasty messages.  A user
 739  * program *should* fix unaligned faults ASAP.
 740  *
 741  * Notice that we have (almost) the regular kernel stack layout here,
 742  * so finding the appropriate registers is a little more difficult
 743  * than in the kernel case.
 744  *
 745  * Finally, we handle regular integer load/stores only.  In
 746  * particular, load-linked/store-conditionally and floating point
 747  * load/stores are not supported.  The former make no sense with
 748  * unaligned faults (they are guaranteed to fail) and I don't think
 749  * the latter will occur in any decent program.
 750  *
 751  * Sigh. We *do* have to handle some FP operations, because GCC will
 752  * uses them as temporary storage for integer memory to memory copies.
 753  * However, we need to deal with stt/ldt and sts/lds only.
 754  */
 755
 756 #define OP_INT_MASK     ( 1L << 0x28 | 1L << 0x2c   /* ldl stl */       \
 757                         | 1L << 0x29 | 1L << 0x2d   /* ldq stq */       \
 758                         | 1L << 0x0c | 1L << 0x0d   /* ldwu stw */      \
 759                         | 1L << 0x0a | 1L << 0x0e ) /* ldbu stb */
 760
 761 #define OP_WRITE_MASK   ( 1L << 0x26 | 1L << 0x27   /* sts stt */       \
 762                         | 1L << 0x2c | 1L << 0x2d   /* stl stq */       \
 763                         | 1L << 0x0d | 1L << 0x0e ) /* stw stb */
 764
 765 #define R(x)    ((size_t) &((struct pt_regs *)0)->x)
 766
 767 static int unauser_reg_offsets[32] = {
 768         R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), R(r8),
 769         /* r9 ... r15 are stored in front of regs.  */
 770         -56, -48, -40, -32, -24, -16, -8,
 771         R(r16), R(r17), R(r18),
 772         R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26),
 773         R(r27), R(r28), R(gp),
 774         0, 0
 775 };
 776
 777 #undef R
 778
 779 asmlinkage void
 780 do_entUnaUser(void __user * va, unsigned long opcode,
 781               unsigned long reg, struct pt_regs *regs)
 782 {
 783         static DEFINE_RATELIMIT_STATE(ratelimit, 5 * HZ, 5);
 784
 785         unsigned long tmp1, tmp2, tmp3, tmp4;
 786         unsigned long fake_reg, *reg_addr = &fake_reg;
 787         siginfo_t info;
 788         long error;
 789
 790         /* Check the UAC bits to decide what the user wants us to do
 791            with the unaliged access.  */
 792
 793         if (!(current_thread_info()->status & TS_UAC_NOPRINT)) {
 794                 if (__ratelimit(&ratelimit)) {
 795                         printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n",
 796                                current->comm, task_pid_nr(current),
 797                                regs->pc - 4, va, opcode, reg);
 798                 }
 799         }
 800         if ((current_thread_info()->status & TS_UAC_SIGBUS))
 801                 goto give_sigbus;
 802         /* Not sure why you'd want to use this, but... */
 803         if ((current_thread_info()->status & TS_UAC_NOFIX))
 804                 return;
 805
 806         /* Don't bother reading ds in the access check since we already
 807            know that this came from the user.  Also rely on the fact that
 808            the page at TASK_SIZE is unmapped and so can't be touched anyway. */
 809         if (!__access_ok((unsigned long)va, 0, USER_DS))
 810                 goto give_sigsegv;
 811
 812         ++unaligned[1].count;
 813         unaligned[1].va = (unsigned long)va;
 814         unaligned[1].pc = regs->pc - 4;
 815
 816         if ((1L << opcode) & OP_INT_MASK) {
 817                 /* it's an integer load/store */
 818                 if (reg < 30) {
 819                         reg_addr = (unsigned long *)
 820                           ((char *)regs + unauser_reg_offsets[reg]);
 821                 } else if (reg == 30) {
 822                         /* usp in PAL regs */
 823                         fake_reg = rdusp();
 824                 } else {
 825                         /* zero "register" */
 826                         fake_reg = 0;
 827                 }
 828         }
 829
 830         /* We don't want to use the generic get/put unaligned macros as
 831            we want to trap exceptions.  Only if we actually get an
 832            exception will we decide whether we should have caught it.  */
 833
 834         switch (opcode) {
 835         case 0x0c: /* ldwu */
 836                 __asm__ __volatile__(
 837                 "1:     ldq_u %1,0(%3)\n"
 838                 "2:     ldq_u %2,1(%3)\n"
 839                 "       extwl %1,%3,%1\n"
 840                 "       extwh %2,%3,%2\n"
 841                 "3:\n"
 842                 ".section __ex_table,\"a\"\n"
 843                 "       .long 1b - .\n"
 844                 "       lda %1,3b-1b(%0)\n"
 845                 "       .long 2b - .\n"
 846                 "       lda %2,3b-2b(%0)\n"
 847                 ".previous"
 848                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 849                         : "r"(va), "0"(0));
 850                 if (error)
 851                         goto give_sigsegv;
 852                 *reg_addr = tmp1|tmp2;
 853                 break;
 854
 855         case 0x22: /* lds */
 856                 __asm__ __volatile__(
 857                 "1:     ldq_u %1,0(%3)\n"
 858                 "2:     ldq_u %2,3(%3)\n"
 859                 "       extll %1,%3,%1\n"
 860                 "       extlh %2,%3,%2\n"
 861                 "3:\n"
 862                 ".section __ex_table,\"a\"\n"
 863                 "       .long 1b - .\n"
 864                 "       lda %1,3b-1b(%0)\n"
 865                 "       .long 2b - .\n"
 866                 "       lda %2,3b-2b(%0)\n"
 867                 ".previous"
 868                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 869                         : "r"(va), "0"(0));
 870                 if (error)
 871                         goto give_sigsegv;
 872                 alpha_write_fp_reg(reg, s_mem_to_reg((int)(tmp1|tmp2)));
 873                 return;
 874
 875         case 0x23: /* ldt */
 876                 __asm__ __volatile__(
 877                 "1:     ldq_u %1,0(%3)\n"
 878                 "2:     ldq_u %2,7(%3)\n"
 879                 "       extql %1,%3,%1\n"
 880                 "       extqh %2,%3,%2\n"
 881                 "3:\n"
 882                 ".section __ex_table,\"a\"\n"
 883                 "       .long 1b - .\n"
 884                 "       lda %1,3b-1b(%0)\n"
 885                 "       .long 2b - .\n"
 886                 "       lda %2,3b-2b(%0)\n"
 887                 ".previous"
 888                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 889                         : "r"(va), "0"(0));
 890                 if (error)
 891                         goto give_sigsegv;
 892                 alpha_write_fp_reg(reg, tmp1|tmp2);
 893                 return;
 894
 895         case 0x28: /* ldl */
 896                 __asm__ __volatile__(
 897                 "1:     ldq_u %1,0(%3)\n"
 898                 "2:     ldq_u %2,3(%3)\n"
 899                 "       extll %1,%3,%1\n"
 900                 "       extlh %2,%3,%2\n"
 901                 "3:\n"
 902                 ".section __ex_table,\"a\"\n"
 903                 "       .long 1b - .\n"
 904                 "       lda %1,3b-1b(%0)\n"
 905                 "       .long 2b - .\n"
 906                 "       lda %2,3b-2b(%0)\n"
 907                 ".previous"
 908                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 909                         : "r"(va), "0"(0));
 910                 if (error)
 911                         goto give_sigsegv;
 912                 *reg_addr = (int)(tmp1|tmp2);
 913                 break;
 914
 915         case 0x29: /* ldq */
 916                 __asm__ __volatile__(
 917                 "1:     ldq_u %1,0(%3)\n"
 918                 "2:     ldq_u %2,7(%3)\n"
 919                 "       extql %1,%3,%1\n"
 920                 "       extqh %2,%3,%2\n"
 921                 "3:\n"
 922                 ".section __ex_table,\"a\"\n"
 923                 "       .long 1b - .\n"
 924                 "       lda %1,3b-1b(%0)\n"
 925                 "       .long 2b - .\n"
 926                 "       lda %2,3b-2b(%0)\n"
 927                 ".previous"
 928                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 929                         : "r"(va), "0"(0));
 930                 if (error)
 931                         goto give_sigsegv;
 932                 *reg_addr = tmp1|tmp2;
 933                 break;
 934
 935         /* Note that the store sequences do not indicate that they change
 936            memory because it _should_ be affecting nothing in this context.
 937            (Otherwise we have other, much larger, problems.)  */
 938         case 0x0d: /* stw */
 939                 __asm__ __volatile__(
 940                 "1:     ldq_u %2,1(%5)\n"
 941                 "2:     ldq_u %1,0(%5)\n"
 942                 "       inswh %6,%5,%4\n"
 943                 "       inswl %6,%5,%3\n"
 944                 "       mskwh %2,%5,%2\n"
 945                 "       mskwl %1,%5,%1\n"
 946                 "       or %2,%4,%2\n"
 947                 "       or %1,%3,%1\n"
 948                 "3:     stq_u %2,1(%5)\n"
 949                 "4:     stq_u %1,0(%5)\n"
 950                 "5:\n"
 951                 ".section __ex_table,\"a\"\n"
 952                 "       .long 1b - .\n"
 953                 "       lda %2,5b-1b(%0)\n"
 954                 "       .long 2b - .\n"
 955                 "       lda %1,5b-2b(%0)\n"
 956                 "       .long 3b - .\n"
 957                 "       lda $31,5b-3b(%0)\n"
 958                 "       .long 4b - .\n"
 959                 "       lda $31,5b-4b(%0)\n"
 960                 ".previous"
 961                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 962                           "=&r"(tmp3), "=&r"(tmp4)
 963                         : "r"(va), "r"(*reg_addr), "0"(0));
 964                 if (error)
 965                         goto give_sigsegv;
 966                 return;
 967
 968         case 0x26: /* sts */
 969                 fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg));
 970                 /* FALLTHRU */
 971
 972         case 0x2c: /* stl */
 973                 __asm__ __volatile__(
 974                 "1:     ldq_u %2,3(%5)\n"
 975                 "2:     ldq_u %1,0(%5)\n"
 976                 "       inslh %6,%5,%4\n"
 977                 "       insll %6,%5,%3\n"
 978                 "       msklh %2,%5,%2\n"
 979                 "       mskll %1,%5,%1\n"
 980                 "       or %2,%4,%2\n"
 981                 "       or %1,%3,%1\n"
 982                 "3:     stq_u %2,3(%5)\n"
 983                 "4:     stq_u %1,0(%5)\n"
 984                 "5:\n"
 985                 ".section __ex_table,\"a\"\n"
 986                 "       .long 1b - .\n"
 987                 "       lda %2,5b-1b(%0)\n"
 988                 "       .long 2b - .\n"
 989                 "       lda %1,5b-2b(%0)\n"
 990                 "       .long 3b - .\n"
 991                 "       lda $31,5b-3b(%0)\n"
 992                 "       .long 4b - .\n"
 993                 "       lda $31,5b-4b(%0)\n"
 994                 ".previous"
 995                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 996                           "=&r"(tmp3), "=&r"(tmp4)
 997                         : "r"(va), "r"(*reg_addr), "0"(0));
 998                 if (error)
 999                         goto give_sigsegv;
1000                 return;
1001
1002         case 0x27: /* stt */
1003                 fake_reg = alpha_read_fp_reg(reg);
1004                 /* FALLTHRU */
1005
1006         case 0x2d: /* stq */
1007                 __asm__ __volatile__(
1008                 "1:     ldq_u %2,7(%5)\n"
1009                 "2:     ldq_u %1,0(%5)\n"
1010                 "       insqh %6,%5,%4\n"
1011                 "       insql %6,%5,%3\n"
1012                 "       mskqh %2,%5,%2\n"
1013                 "       mskql %1,%5,%1\n"
1014                 "       or %2,%4,%2\n"
1015                 "       or %1,%3,%1\n"
1016                 "3:     stq_u %2,7(%5)\n"
1017                 "4:     stq_u %1,0(%5)\n"
1018                 "5:\n"
1019                 ".section __ex_table,\"a\"\n\t"
1020                 "       .long 1b - .\n"
1021                 "       lda %2,5b-1b(%0)\n"
1022                 "       .long 2b - .\n"
1023                 "       lda %1,5b-2b(%0)\n"
1024                 "       .long 3b - .\n"
1025                 "       lda $31,5b-3b(%0)\n"
1026                 "       .long 4b - .\n"
1027                 "       lda $31,5b-4b(%0)\n"
1028                 ".previous"
1029                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
1030                           "=&r"(tmp3), "=&r"(tmp4)
1031                         : "r"(va), "r"(*reg_addr), "0"(0));
1032                 if (error)
1033                         goto give_sigsegv;
1034                 return;
1035
1036         default:
1037                 /* What instruction were you trying to use, exactly?  */
1038                 goto give_sigbus;
1039         }
1040
1041         /* Only integer loads should get here; everyone else returns early. */
1042         if (reg == 30)
1043                 wrusp(fake_reg);
1044         return;
1045
1046 give_sigsegv:
1047         regs->pc -= 4;  /* make pc point to faulting insn */
1048         info.si_signo = SIGSEGV;
1049         info.si_errno = 0;
1050
1051         /* We need to replicate some of the logic in mm/fault.c,
1052            since we don't have access to the fault code in the
1053            exception handling return path.  */
1054         if (!__access_ok((unsigned long)va, 0, USER_DS))
1055                 info.si_code = SEGV_ACCERR;
1056         else {
1057                 struct mm_struct *mm = current->mm;
1058                 down_read(&mm->mmap_sem);
1059                 if (find_vma(mm, (unsigned long)va))
1060                         info.si_code = SEGV_ACCERR;
1061                 else
1062                         info.si_code = SEGV_MAPERR;
1063                 up_read(&mm->mmap_sem);
1064         }
1065         info.si_addr = va;
1066         send_sig_info(SIGSEGV, &info, current);
1067         return;
1068
1069 give_sigbus:
1070         regs->pc -= 4;
1071         info.si_signo = SIGBUS;
1072         info.si_errno = 0;
1073         info.si_code = BUS_ADRALN;
1074         info.si_addr = va;
1075         send_sig_info(SIGBUS, &info, current);
1076         return;
1077 }
1078
1079 void
1080 trap_init(void)
1081 {
1082         /* Tell PAL-code what global pointer we want in the kernel.  */
1083         register unsigned long gptr __asm__("$29");
1084         wrkgp(gptr);
1085
1086         /* Hack for Multia (UDB) and JENSEN: some of their SRMs have
1087            a bug in the handling of the opDEC fault.  Fix it up if so.  */
1088         if (implver() == IMPLVER_EV4)
1089                 opDEC_check();
1090
1091         wrent(entArith, 1);
1092         wrent(entMM, 2);
1093         wrent(entIF, 3);
1094         wrent(entUna, 4);
1095         wrent(entSys, 5);
1096         wrent(entDbg, 6);
1097 }