1 /* SPDX-License-Identifier: GPL-2.0 */
7 #include <linux/kernel.h>
9 #include <asm/compiler.h>
10 #include <asm/machvec.h>
11 #include <asm/hwrpb.h>
13 /* The generic header contains only prototypes. Including it ensures that
14 the implementation we have here matches that interface. */
15 #include <asm-generic/iomap.h>
18 * Virtual -> physical identity mapping starts at this offset
20 #ifdef USE_48_BIT_KSEG
21 #define IDENT_ADDR 0xffff800000000000UL
23 #define IDENT_ADDR 0xfffffc0000000000UL
27 * We try to avoid hae updates (thus the cache), but when we
28 * do need to update the hae, we need to do it atomically, so
29 * that any interrupts wouldn't get confused with the hae
30 * register not being up-to-date with respect to the hardware
33 extern inline void __set_hae(unsigned long new_hae)
35 unsigned long flags = swpipl(IPL_MAX);
39 alpha_mv.hae_cache = new_hae;
40 *alpha_mv.hae_register = new_hae;
42 /* Re-read to make sure it was written. */
43 new_hae = *alpha_mv.hae_register;
49 extern inline void set_hae(unsigned long new_hae)
51 if (new_hae != alpha_mv.hae_cache)
56 * Change virtual addresses to physical addresses and vv.
58 #ifdef USE_48_BIT_KSEG
59 static inline unsigned long virt_to_phys(volatile void *address)
61 return (unsigned long)address - IDENT_ADDR;
64 static inline void * phys_to_virt(unsigned long address)
66 return (void *) (address + IDENT_ADDR);
69 static inline unsigned long virt_to_phys(volatile void *address)
71 unsigned long phys = (unsigned long)address;
73 /* Sign-extend from bit 41. */
75 phys = (long)phys >> (64 - 41);
77 /* Crop to the physical address width of the processor. */
78 phys &= (1ul << hwrpb->pa_bits) - 1;
83 static inline void * phys_to_virt(unsigned long address)
85 return (void *)(IDENT_ADDR + (address & ((1ul << 41) - 1)));
89 #define virt_to_phys virt_to_phys
90 #define phys_to_virt phys_to_virt
91 #define page_to_phys(page) page_to_pa(page)
93 /* Maximum PIO space address supported? */
94 #define IO_SPACE_LIMIT 0xffff
97 * Change addresses as seen by the kernel (virtual) to addresses as
98 * seen by a device (bus), and vice versa.
100 * Note that this only works for a limited range of kernel addresses,
101 * and very well may not span all memory. Consider this interface
102 * deprecated in favour of the DMA-mapping API.
104 extern unsigned long __direct_map_base;
105 extern unsigned long __direct_map_size;
107 static inline unsigned long __deprecated isa_virt_to_bus(volatile void *address)
109 unsigned long phys = virt_to_phys(address);
110 unsigned long bus = phys + __direct_map_base;
111 return phys <= __direct_map_size ? bus : 0;
113 #define isa_virt_to_bus isa_virt_to_bus
115 static inline void * __deprecated isa_bus_to_virt(unsigned long address)
119 /* This check is a sanity check but also ensures that bus address 0
120 maps to virtual address 0 which is useful to detect null pointers
121 (the NCR driver is much simpler if NULL pointers are preserved). */
122 address -= __direct_map_base;
123 virt = phys_to_virt(address);
124 return (long)address <= 0 ? NULL : virt;
126 #define isa_bus_to_virt isa_bus_to_virt
129 * There are different chipsets to interface the Alpha CPUs to the world.
132 #define IO_CONCAT(a,b) _IO_CONCAT(a,b)
133 #define _IO_CONCAT(a,b) a ## _ ## b
135 #ifdef CONFIG_ALPHA_GENERIC
137 /* In a generic kernel, we always go through the machine vector. */
139 #define REMAP1(TYPE, NAME, QUAL) \
140 static inline TYPE generic_##NAME(QUAL void __iomem *addr) \
142 return alpha_mv.mv_##NAME(addr); \
145 #define REMAP2(TYPE, NAME, QUAL) \
146 static inline void generic_##NAME(TYPE b, QUAL void __iomem *addr) \
148 alpha_mv.mv_##NAME(b, addr); \
151 REMAP1(unsigned int, ioread8, const)
152 REMAP1(unsigned int, ioread16, const)
153 REMAP1(unsigned int, ioread32, const)
154 REMAP1(u64, ioread64, const)
155 REMAP1(u8, readb, const volatile)
156 REMAP1(u16, readw, const volatile)
157 REMAP1(u32, readl, const volatile)
158 REMAP1(u64, readq, const volatile)
160 REMAP2(u8, iowrite8, /**/)
161 REMAP2(u16, iowrite16, /**/)
162 REMAP2(u32, iowrite32, /**/)
163 REMAP2(u64, iowrite64, /**/)
164 REMAP2(u8, writeb, volatile)
165 REMAP2(u16, writew, volatile)
166 REMAP2(u32, writel, volatile)
167 REMAP2(u64, writeq, volatile)
172 extern inline void __iomem *generic_ioportmap(unsigned long a)
174 return alpha_mv.mv_ioportmap(a);
177 static inline void __iomem *generic_ioremap(unsigned long a, unsigned long s)
179 return alpha_mv.mv_ioremap(a, s);
182 static inline void generic_iounmap(volatile void __iomem *a)
184 return alpha_mv.mv_iounmap(a);
187 static inline int generic_is_ioaddr(unsigned long a)
189 return alpha_mv.mv_is_ioaddr(a);
192 static inline int generic_is_mmio(const volatile void __iomem *a)
194 return alpha_mv.mv_is_mmio(a);
197 #define __IO_PREFIX generic
198 #define generic_trivial_rw_bw 0
199 #define generic_trivial_rw_lq 0
200 #define generic_trivial_io_bw 0
201 #define generic_trivial_io_lq 0
202 #define generic_trivial_iounmap 0
206 #if defined(CONFIG_ALPHA_APECS)
207 # include <asm/core_apecs.h>
208 #elif defined(CONFIG_ALPHA_CIA)
209 # include <asm/core_cia.h>
210 #elif defined(CONFIG_ALPHA_IRONGATE)
211 # include <asm/core_irongate.h>
212 #elif defined(CONFIG_ALPHA_JENSEN)
213 # include <asm/jensen.h>
214 #elif defined(CONFIG_ALPHA_LCA)
215 # include <asm/core_lca.h>
216 #elif defined(CONFIG_ALPHA_MARVEL)
217 # include <asm/core_marvel.h>
218 #elif defined(CONFIG_ALPHA_MCPCIA)
219 # include <asm/core_mcpcia.h>
220 #elif defined(CONFIG_ALPHA_POLARIS)
221 # include <asm/core_polaris.h>
222 #elif defined(CONFIG_ALPHA_T2)
223 # include <asm/core_t2.h>
224 #elif defined(CONFIG_ALPHA_TSUNAMI)
225 # include <asm/core_tsunami.h>
226 #elif defined(CONFIG_ALPHA_TITAN)
227 # include <asm/core_titan.h>
228 #elif defined(CONFIG_ALPHA_WILDFIRE)
229 # include <asm/core_wildfire.h>
231 #error "What system is this?"
237 * We always have external versions of these routines.
239 extern u8 inb(unsigned long port);
240 extern u16 inw(unsigned long port);
241 extern u32 inl(unsigned long port);
242 extern void outb(u8 b, unsigned long port);
243 extern void outw(u16 b, unsigned long port);
244 extern void outl(u32 b, unsigned long port);
252 extern u8 readb(const volatile void __iomem *addr);
253 extern u16 readw(const volatile void __iomem *addr);
254 extern u32 readl(const volatile void __iomem *addr);
255 extern u64 readq(const volatile void __iomem *addr);
256 extern void writeb(u8 b, volatile void __iomem *addr);
257 extern void writew(u16 b, volatile void __iomem *addr);
258 extern void writel(u32 b, volatile void __iomem *addr);
259 extern void writeq(u64 b, volatile void __iomem *addr);
264 #define writeb writeb
265 #define writew writew
266 #define writel writel
267 #define writeq writeq
269 extern u8 __raw_readb(const volatile void __iomem *addr);
270 extern u16 __raw_readw(const volatile void __iomem *addr);
271 extern u32 __raw_readl(const volatile void __iomem *addr);
272 extern u64 __raw_readq(const volatile void __iomem *addr);
273 extern void __raw_writeb(u8 b, volatile void __iomem *addr);
274 extern void __raw_writew(u16 b, volatile void __iomem *addr);
275 extern void __raw_writel(u32 b, volatile void __iomem *addr);
276 extern void __raw_writeq(u64 b, volatile void __iomem *addr);
277 #define __raw_readb __raw_readb
278 #define __raw_readw __raw_readw
279 #define __raw_readl __raw_readl
280 #define __raw_readq __raw_readq
281 #define __raw_writeb __raw_writeb
282 #define __raw_writew __raw_writew
283 #define __raw_writel __raw_writel
284 #define __raw_writeq __raw_writeq
287 * Mapping from port numbers to __iomem space is pretty easy.
290 /* These two have to be extern inline because of the extern prototype from
291 <asm-generic/iomap.h>. It is not legal to mix "extern" and "static" for
292 the same declaration. */
293 extern inline void __iomem *ioport_map(unsigned long port, unsigned int size)
295 return IO_CONCAT(__IO_PREFIX,ioportmap) (port);
298 extern inline void ioport_unmap(void __iomem *addr)
302 #define ioport_map ioport_map
303 #define ioport_unmap ioport_unmap
305 static inline void __iomem *ioremap(unsigned long port, unsigned long size)
307 return IO_CONCAT(__IO_PREFIX,ioremap) (port, size);
310 #define ioremap_wc ioremap
311 #define ioremap_uc ioremap
313 static inline void iounmap(volatile void __iomem *addr)
315 IO_CONCAT(__IO_PREFIX,iounmap)(addr);
318 static inline int __is_ioaddr(unsigned long addr)
320 return IO_CONCAT(__IO_PREFIX,is_ioaddr)(addr);
322 #define __is_ioaddr(a) __is_ioaddr((unsigned long)(a))
324 static inline int __is_mmio(const volatile void __iomem *addr)
326 return IO_CONCAT(__IO_PREFIX,is_mmio)(addr);
331 * If the actual I/O bits are sufficiently trivial, then expand inline.
334 #if IO_CONCAT(__IO_PREFIX,trivial_io_bw)
335 extern inline unsigned int ioread8(const void __iomem *addr)
339 ret = IO_CONCAT(__IO_PREFIX,ioread8)(addr);
344 extern inline unsigned int ioread16(const void __iomem *addr)
348 ret = IO_CONCAT(__IO_PREFIX,ioread16)(addr);
353 extern inline void iowrite8(u8 b, void __iomem *addr)
356 IO_CONCAT(__IO_PREFIX, iowrite8)(b, addr);
359 extern inline void iowrite16(u16 b, void __iomem *addr)
362 IO_CONCAT(__IO_PREFIX, iowrite16)(b, addr);
365 extern inline u8 inb(unsigned long port)
367 return ioread8(ioport_map(port, 1));
370 extern inline u16 inw(unsigned long port)
372 return ioread16(ioport_map(port, 2));
375 extern inline void outb(u8 b, unsigned long port)
377 iowrite8(b, ioport_map(port, 1));
380 extern inline void outw(u16 b, unsigned long port)
382 iowrite16(b, ioport_map(port, 2));
386 #define ioread8 ioread8
387 #define ioread16 ioread16
388 #define iowrite8 iowrite8
389 #define iowrite16 iowrite16
391 #if IO_CONCAT(__IO_PREFIX,trivial_io_lq)
392 extern inline unsigned int ioread32(const void __iomem *addr)
396 ret = IO_CONCAT(__IO_PREFIX,ioread32)(addr);
401 extern inline u64 ioread64(const void __iomem *addr)
405 ret = IO_CONCAT(__IO_PREFIX,ioread64)(addr);
410 extern inline void iowrite32(u32 b, void __iomem *addr)
413 IO_CONCAT(__IO_PREFIX, iowrite32)(b, addr);
416 extern inline void iowrite64(u64 b, void __iomem *addr)
419 IO_CONCAT(__IO_PREFIX, iowrite64)(b, addr);
422 extern inline u32 inl(unsigned long port)
424 return ioread32(ioport_map(port, 4));
427 extern inline void outl(u32 b, unsigned long port)
429 iowrite32(b, ioport_map(port, 4));
433 #define ioread32 ioread32
434 #define ioread64 ioread64
435 #define iowrite32 iowrite32
436 #define iowrite64 iowrite64
438 #if IO_CONCAT(__IO_PREFIX,trivial_rw_bw) == 1
439 extern inline u8 __raw_readb(const volatile void __iomem *addr)
441 return IO_CONCAT(__IO_PREFIX,readb)(addr);
444 extern inline u16 __raw_readw(const volatile void __iomem *addr)
446 return IO_CONCAT(__IO_PREFIX,readw)(addr);
449 extern inline void __raw_writeb(u8 b, volatile void __iomem *addr)
451 IO_CONCAT(__IO_PREFIX,writeb)(b, addr);
454 extern inline void __raw_writew(u16 b, volatile void __iomem *addr)
456 IO_CONCAT(__IO_PREFIX,writew)(b, addr);
459 extern inline u8 readb(const volatile void __iomem *addr)
463 ret = __raw_readb(addr);
468 extern inline u16 readw(const volatile void __iomem *addr)
472 ret = __raw_readw(addr);
477 extern inline void writeb(u8 b, volatile void __iomem *addr)
480 __raw_writeb(b, addr);
483 extern inline void writew(u16 b, volatile void __iomem *addr)
486 __raw_writew(b, addr);
490 #if IO_CONCAT(__IO_PREFIX,trivial_rw_lq) == 1
491 extern inline u32 __raw_readl(const volatile void __iomem *addr)
493 return IO_CONCAT(__IO_PREFIX,readl)(addr);
496 extern inline u64 __raw_readq(const volatile void __iomem *addr)
498 return IO_CONCAT(__IO_PREFIX,readq)(addr);
501 extern inline void __raw_writel(u32 b, volatile void __iomem *addr)
503 IO_CONCAT(__IO_PREFIX,writel)(b, addr);
506 extern inline void __raw_writeq(u64 b, volatile void __iomem *addr)
508 IO_CONCAT(__IO_PREFIX,writeq)(b, addr);
511 extern inline u32 readl(const volatile void __iomem *addr)
515 ret = __raw_readl(addr);
520 extern inline u64 readq(const volatile void __iomem *addr)
524 ret = __raw_readq(addr);
529 extern inline void writel(u32 b, volatile void __iomem *addr)
532 __raw_writel(b, addr);
535 extern inline void writeq(u64 b, volatile void __iomem *addr)
538 __raw_writeq(b, addr);
542 #define ioread16be(p) swab16(ioread16(p))
543 #define ioread32be(p) swab32(ioread32(p))
544 #define iowrite16be(v,p) iowrite16(swab16(v), (p))
545 #define iowrite32be(v,p) iowrite32(swab32(v), (p))
554 extern u8 readb_relaxed(const volatile void __iomem *addr);
555 extern u16 readw_relaxed(const volatile void __iomem *addr);
556 extern u32 readl_relaxed(const volatile void __iomem *addr);
557 extern u64 readq_relaxed(const volatile void __iomem *addr);
558 #define readb_relaxed readb_relaxed
559 #define readw_relaxed readw_relaxed
560 #define readl_relaxed readl_relaxed
561 #define readq_relaxed readq_relaxed
563 #if IO_CONCAT(__IO_PREFIX,trivial_io_bw)
564 extern inline u8 readb_relaxed(const volatile void __iomem *addr)
567 return __raw_readb(addr);
570 extern inline u16 readw_relaxed(const volatile void __iomem *addr)
573 return __raw_readw(addr);
577 #if IO_CONCAT(__IO_PREFIX,trivial_io_lq)
578 extern inline u32 readl_relaxed(const volatile void __iomem *addr)
581 return __raw_readl(addr);
584 extern inline u64 readq_relaxed(const volatile void __iomem *addr)
587 return __raw_readq(addr);
591 #define writeb_relaxed writeb
592 #define writew_relaxed writew
593 #define writel_relaxed writel
594 #define writeq_relaxed writeq
597 * String version of IO memory access ops:
599 extern void memcpy_fromio(void *, const volatile void __iomem *, long);
600 extern void memcpy_toio(volatile void __iomem *, const void *, long);
601 extern void _memset_c_io(volatile void __iomem *, unsigned long, long);
603 static inline void memset_io(volatile void __iomem *addr, u8 c, long len)
605 _memset_c_io(addr, 0x0101010101010101UL * c, len);
608 #define __HAVE_ARCH_MEMSETW_IO
609 static inline void memsetw_io(volatile void __iomem *addr, u16 c, long len)
611 _memset_c_io(addr, 0x0001000100010001UL * c, len);
614 #define memset_io memset_io
615 #define memcpy_fromio memcpy_fromio
616 #define memcpy_toio memcpy_toio
619 * String versions of in/out ops:
621 extern void insb (unsigned long port, void *dst, unsigned long count);
622 extern void insw (unsigned long port, void *dst, unsigned long count);
623 extern void insl (unsigned long port, void *dst, unsigned long count);
624 extern void outsb (unsigned long port, const void *src, unsigned long count);
625 extern void outsw (unsigned long port, const void *src, unsigned long count);
626 extern void outsl (unsigned long port, const void *src, unsigned long count);
636 * The Alpha Jensen hardware for some rather strange reason puts
637 * the RTC clock at 0x170 instead of 0x70. Probably due to some
638 * misguided idea about using 0x70 for NMI stuff.
640 * These defines will override the defaults when doing RTC queries
643 #ifdef CONFIG_ALPHA_GENERIC
644 # define RTC_PORT(x) ((x) + alpha_mv.rtc_port)
646 # ifdef CONFIG_ALPHA_JENSEN
647 # define RTC_PORT(x) (0x170+(x))
649 # define RTC_PORT(x) (0x70 + (x))
652 #define RTC_ALWAYS_BCD 0
655 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
658 #define xlate_dev_mem_ptr(p) __va(p)
661 * These get provided from <asm-generic/iomap.h> since alpha does not
662 * select GENERIC_IOMAP.
664 #define ioread64 ioread64
665 #define iowrite64 iowrite64
666 #define ioread64be ioread64be
667 #define iowrite64be iowrite64be
668 #define ioread8_rep ioread8_rep
669 #define ioread16_rep ioread16_rep
670 #define ioread32_rep ioread32_rep
671 #define iowrite8_rep iowrite8_rep
672 #define iowrite16_rep iowrite16_rep
673 #define iowrite32_rep iowrite32_rep
674 #define pci_iounmap pci_iounmap
676 #include <asm-generic/io.h>
678 #endif /* __KERNEL__ */
680 #endif /* __ALPHA_IO_H */