2 * Copyright 2015 Advanced Micro Devices, Inc.
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5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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26 #include <drm/drm_crtc.h>
29 #include "amdgpu_dm.h"
32 enum amdgpu_dm_pipe_crc_source {
33 AMDGPU_DM_PIPE_CRC_SOURCE_NONE = 0,
34 AMDGPU_DM_PIPE_CRC_SOURCE_AUTO,
35 AMDGPU_DM_PIPE_CRC_SOURCE_MAX,
36 AMDGPU_DM_PIPE_CRC_SOURCE_INVALID = -1,
39 static enum amdgpu_dm_pipe_crc_source dm_parse_crc_source(const char *source)
41 if (!source || !strcmp(source, "none"))
42 return AMDGPU_DM_PIPE_CRC_SOURCE_NONE;
43 if (!strcmp(source, "auto"))
44 return AMDGPU_DM_PIPE_CRC_SOURCE_AUTO;
46 return AMDGPU_DM_PIPE_CRC_SOURCE_INVALID;
49 int amdgpu_dm_crtc_set_crc_source(struct drm_crtc *crtc, const char *src_name,
52 struct dm_crtc_state *crtc_state = to_dm_crtc_state(crtc->state);
53 struct dc_stream_state *stream_state = crtc_state->stream;
56 enum amdgpu_dm_pipe_crc_source source = dm_parse_crc_source(src_name);
59 DRM_DEBUG_DRIVER("Unknown CRC source %s for CRTC%d\n",
60 src_name, crtc->index);
65 DRM_ERROR("No stream state for CRTC%d\n", crtc->index);
69 enable = (source == AMDGPU_DM_PIPE_CRC_SOURCE_AUTO);
71 if (!dc_stream_configure_crc(stream_state->ctx->dc, stream_state,
75 /* When enabling CRC, we should also disable dithering. */
76 dc_stream_set_dither_option(stream_state,
77 enable ? DITHER_OPTION_TRUN8
78 : DITHER_OPTION_DEFAULT);
81 * Reading the CRC requires the vblank interrupt handler to be
82 * enabled. Keep a reference until CRC capture stops.
84 if (!crtc_state->crc_enabled && enable)
85 drm_crtc_vblank_get(crtc);
86 else if (crtc_state->crc_enabled && !enable)
87 drm_crtc_vblank_put(crtc);
89 crtc_state->crc_enabled = enable;
92 /* Reset crc_skipped on dm state */
93 crtc_state->crc_skip_count = 0;
98 * amdgpu_dm_crtc_handle_crc_irq: Report to DRM the CRC on given CRTC.
99 * @crtc: DRM CRTC object.
101 * This function should be called at the end of a vblank, when the fb has been
102 * fully processed through the pipe.
104 void amdgpu_dm_crtc_handle_crc_irq(struct drm_crtc *crtc)
106 struct dm_crtc_state *crtc_state;
107 struct dc_stream_state *stream_state;
113 crtc_state = to_dm_crtc_state(crtc->state);
114 stream_state = crtc_state->stream;
116 /* Early return if CRC capture is not enabled. */
117 if (!crtc_state->crc_enabled)
121 * Since flipping and crc enablement happen asynchronously, we - more
122 * often than not - will be returning an 'uncooked' crc on first frame.
123 * Probably because hw isn't ready yet. For added security, skip the
124 * first two CRC values.
126 if (crtc_state->crc_skip_count < 2) {
127 crtc_state->crc_skip_count += 1;
131 if (!dc_stream_get_crc(stream_state->ctx->dc, stream_state,
132 &crcs[0], &crcs[1], &crcs[2]))
135 drm_crtc_add_crc_entry(crtc, true,
136 drm_crtc_accurate_vblank_count(crtc), crcs);