2 * Copyright(c) 2015, 2016 Intel Corporation.
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
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21 * modification, are permitted provided that the following conditions
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47 #include <linux/topology.h>
48 #include <linux/cpumask.h>
49 #include <linux/module.h>
50 #include <linux/interrupt.h>
57 struct hfi1_affinity_node_list node_affinity = {
58 .list = LIST_HEAD_INIT(node_affinity.list),
59 .lock = __MUTEX_INITIALIZER(node_affinity.lock)
62 /* Name of IRQ types, indexed by enum irq_type */
63 static const char * const irq_type_names[] = {
70 /* Per NUMA node count of HFI devices */
71 static unsigned int *hfi1_per_node_cntr;
73 static inline void init_cpu_mask_set(struct cpu_mask_set *set)
75 cpumask_clear(&set->mask);
76 cpumask_clear(&set->used);
80 /* Initialize non-HT cpu cores mask */
81 void init_real_cpu_mask(void)
83 int possible, curr_cpu, i, ht;
85 cpumask_clear(&node_affinity.real_cpu_mask);
87 /* Start with cpu online mask as the real cpu mask */
88 cpumask_copy(&node_affinity.real_cpu_mask, cpu_online_mask);
91 * Remove HT cores from the real cpu mask. Do this in two steps below.
93 possible = cpumask_weight(&node_affinity.real_cpu_mask);
94 ht = cpumask_weight(topology_sibling_cpumask(
95 cpumask_first(&node_affinity.real_cpu_mask)));
97 * Step 1. Skip over the first N HT siblings and use them as the
98 * "real" cores. Assumes that HT cores are not enumerated in
99 * succession (except in the single core case).
101 curr_cpu = cpumask_first(&node_affinity.real_cpu_mask);
102 for (i = 0; i < possible / ht; i++)
103 curr_cpu = cpumask_next(curr_cpu, &node_affinity.real_cpu_mask);
105 * Step 2. Remove the remaining HT siblings. Use cpumask_next() to
108 for (; i < possible; i++) {
109 cpumask_clear_cpu(curr_cpu, &node_affinity.real_cpu_mask);
110 curr_cpu = cpumask_next(curr_cpu, &node_affinity.real_cpu_mask);
114 int node_affinity_init(void)
117 struct pci_dev *dev = NULL;
118 const struct pci_device_id *ids = hfi1_pci_tbl;
120 cpumask_clear(&node_affinity.proc.used);
121 cpumask_copy(&node_affinity.proc.mask, cpu_online_mask);
123 node_affinity.proc.gen = 0;
124 node_affinity.num_core_siblings =
125 cpumask_weight(topology_sibling_cpumask(
126 cpumask_first(&node_affinity.proc.mask)
128 node_affinity.num_online_nodes = num_online_nodes();
129 node_affinity.num_online_cpus = num_online_cpus();
132 * The real cpu mask is part of the affinity struct but it has to be
133 * initialized early. It is needed to calculate the number of user
134 * contexts in set_up_context_variables().
136 init_real_cpu_mask();
138 hfi1_per_node_cntr = kcalloc(num_possible_nodes(),
139 sizeof(*hfi1_per_node_cntr), GFP_KERNEL);
140 if (!hfi1_per_node_cntr)
143 while (ids->vendor) {
145 while ((dev = pci_get_device(ids->vendor, ids->device, dev))) {
146 node = pcibus_to_node(dev->bus);
148 node = numa_node_id();
150 hfi1_per_node_cntr[node]++;
158 void node_affinity_destroy(void)
160 struct list_head *pos, *q;
161 struct hfi1_affinity_node *entry;
163 mutex_lock(&node_affinity.lock);
164 list_for_each_safe(pos, q, &node_affinity.list) {
165 entry = list_entry(pos, struct hfi1_affinity_node,
170 mutex_unlock(&node_affinity.lock);
171 kfree(hfi1_per_node_cntr);
174 static struct hfi1_affinity_node *node_affinity_allocate(int node)
176 struct hfi1_affinity_node *entry;
178 entry = kzalloc(sizeof(*entry), GFP_KERNEL);
182 INIT_LIST_HEAD(&entry->list);
188 * It appends an entry to the list.
189 * It *must* be called with node_affinity.lock held.
191 static void node_affinity_add_tail(struct hfi1_affinity_node *entry)
193 list_add_tail(&entry->list, &node_affinity.list);
196 /* It must be called with node_affinity.lock held */
197 static struct hfi1_affinity_node *node_affinity_lookup(int node)
199 struct list_head *pos;
200 struct hfi1_affinity_node *entry;
202 list_for_each(pos, &node_affinity.list) {
203 entry = list_entry(pos, struct hfi1_affinity_node, list);
204 if (entry->node == node)
212 * Interrupt affinity.
214 * non-rcv avail gets a default mask that
215 * starts as possible cpus with threads reset
216 * and each rcv avail reset.
218 * rcv avail gets node relative 1 wrapping back
219 * to the node relative 1 as necessary.
222 int hfi1_dev_affinity_init(struct hfi1_devdata *dd)
224 int node = pcibus_to_node(dd->pcidev->bus);
225 struct hfi1_affinity_node *entry;
226 const struct cpumask *local_mask;
227 int curr_cpu, possible, i;
230 node = numa_node_id();
233 local_mask = cpumask_of_node(dd->node);
234 if (cpumask_first(local_mask) >= nr_cpu_ids)
235 local_mask = topology_core_cpumask(0);
237 mutex_lock(&node_affinity.lock);
238 entry = node_affinity_lookup(dd->node);
241 * If this is the first time this NUMA node's affinity is used,
242 * create an entry in the global affinity structure and initialize it.
245 entry = node_affinity_allocate(node);
248 "Unable to allocate global affinity node\n");
249 mutex_unlock(&node_affinity.lock);
252 init_cpu_mask_set(&entry->def_intr);
253 init_cpu_mask_set(&entry->rcv_intr);
254 cpumask_clear(&entry->general_intr_mask);
255 /* Use the "real" cpu mask of this node as the default */
256 cpumask_and(&entry->def_intr.mask, &node_affinity.real_cpu_mask,
259 /* fill in the receive list */
260 possible = cpumask_weight(&entry->def_intr.mask);
261 curr_cpu = cpumask_first(&entry->def_intr.mask);
264 /* only one CPU, everyone will use it */
265 cpumask_set_cpu(curr_cpu, &entry->rcv_intr.mask);
266 cpumask_set_cpu(curr_cpu, &entry->general_intr_mask);
269 * The general/control context will be the first CPU in
270 * the default list, so it is removed from the default
271 * list and added to the general interrupt list.
273 cpumask_clear_cpu(curr_cpu, &entry->def_intr.mask);
274 cpumask_set_cpu(curr_cpu, &entry->general_intr_mask);
275 curr_cpu = cpumask_next(curr_cpu,
276 &entry->def_intr.mask);
279 * Remove the remaining kernel receive queues from
280 * the default list and add them to the receive list.
283 i < (dd->n_krcv_queues - 1) *
284 hfi1_per_node_cntr[dd->node];
286 cpumask_clear_cpu(curr_cpu,
287 &entry->def_intr.mask);
288 cpumask_set_cpu(curr_cpu,
289 &entry->rcv_intr.mask);
290 curr_cpu = cpumask_next(curr_cpu,
291 &entry->def_intr.mask);
292 if (curr_cpu >= nr_cpu_ids)
297 * If there ends up being 0 CPU cores leftover for SDMA
298 * engines, use the same CPU cores as general/control
301 if (cpumask_weight(&entry->def_intr.mask) == 0)
302 cpumask_copy(&entry->def_intr.mask,
303 &entry->general_intr_mask);
306 node_affinity_add_tail(entry);
308 mutex_unlock(&node_affinity.lock);
313 * Function updates the irq affinity hint for msix after it has been changed
314 * by the user using the /proc/irq interface. This function only accepts
315 * one cpu in the mask.
317 static void hfi1_update_sdma_affinity(struct hfi1_msix_entry *msix, int cpu)
319 struct sdma_engine *sde = msix->arg;
320 struct hfi1_devdata *dd = sde->dd;
321 struct hfi1_affinity_node *entry;
322 struct cpu_mask_set *set;
325 if (cpu > num_online_cpus() || cpu == sde->cpu)
328 mutex_lock(&node_affinity.lock);
329 entry = node_affinity_lookup(dd->node);
335 cpumask_clear(&msix->mask);
336 cpumask_set_cpu(cpu, &msix->mask);
337 dd_dev_dbg(dd, "IRQ vector: %u, type %s engine %u -> cpu: %d\n",
338 msix->msix.vector, irq_type_names[msix->type],
340 irq_set_affinity_hint(msix->msix.vector, &msix->mask);
343 * Set the new cpu in the hfi1_affinity_node and clean
344 * the old cpu if it is not used by any other IRQ
346 set = &entry->def_intr;
347 cpumask_set_cpu(cpu, &set->mask);
348 cpumask_set_cpu(cpu, &set->used);
349 for (i = 0; i < dd->num_msix_entries; i++) {
350 struct hfi1_msix_entry *other_msix;
352 other_msix = &dd->msix_entries[i];
353 if (other_msix->type != IRQ_SDMA || other_msix == msix)
356 if (cpumask_test_cpu(old_cpu, &other_msix->mask))
359 cpumask_clear_cpu(old_cpu, &set->mask);
360 cpumask_clear_cpu(old_cpu, &set->used);
362 mutex_unlock(&node_affinity.lock);
365 static void hfi1_irq_notifier_notify(struct irq_affinity_notify *notify,
366 const cpumask_t *mask)
368 int cpu = cpumask_first(mask);
369 struct hfi1_msix_entry *msix = container_of(notify,
370 struct hfi1_msix_entry,
373 /* Only one CPU configuration supported currently */
374 hfi1_update_sdma_affinity(msix, cpu);
377 static void hfi1_irq_notifier_release(struct kref *ref)
380 * This is required by affinity notifier. We don't have anything to
385 static void hfi1_setup_sdma_notifier(struct hfi1_msix_entry *msix)
387 struct irq_affinity_notify *notify = &msix->notify;
389 notify->irq = msix->msix.vector;
390 notify->notify = hfi1_irq_notifier_notify;
391 notify->release = hfi1_irq_notifier_release;
393 if (irq_set_affinity_notifier(notify->irq, notify))
394 pr_err("Failed to register sdma irq affinity notifier for irq %d\n",
398 static void hfi1_cleanup_sdma_notifier(struct hfi1_msix_entry *msix)
400 struct irq_affinity_notify *notify = &msix->notify;
402 if (irq_set_affinity_notifier(notify->irq, NULL))
403 pr_err("Failed to cleanup sdma irq affinity notifier for irq %d\n",
408 * Function sets the irq affinity for msix.
409 * It *must* be called with node_affinity.lock held.
411 static int get_irq_affinity(struct hfi1_devdata *dd,
412 struct hfi1_msix_entry *msix)
416 struct hfi1_affinity_node *entry;
417 struct cpu_mask_set *set = NULL;
418 struct sdma_engine *sde = NULL;
419 struct hfi1_ctxtdata *rcd = NULL;
424 cpumask_clear(&msix->mask);
426 ret = zalloc_cpumask_var(&diff, GFP_KERNEL);
430 entry = node_affinity_lookup(dd->node);
432 switch (msix->type) {
434 sde = (struct sdma_engine *)msix->arg;
435 scnprintf(extra, 64, "engine %u", sde->this_idx);
436 set = &entry->def_intr;
439 cpu = cpumask_first(&entry->general_intr_mask);
442 rcd = (struct hfi1_ctxtdata *)msix->arg;
443 if (rcd->ctxt == HFI1_CTRL_CTXT)
444 cpu = cpumask_first(&entry->general_intr_mask);
446 set = &entry->rcv_intr;
447 scnprintf(extra, 64, "ctxt %u", rcd->ctxt);
450 dd_dev_err(dd, "Invalid IRQ type %d\n", msix->type);
455 * The general and control contexts are placed on a particular
456 * CPU, which is set above. Skip accounting for it. Everything else
457 * finds its CPU here.
459 if (cpu == -1 && set) {
460 if (cpumask_equal(&set->mask, &set->used)) {
462 * We've used up all the CPUs, bump up the generation
463 * and reset the 'used' map
466 cpumask_clear(&set->used);
468 cpumask_andnot(diff, &set->mask, &set->used);
469 cpu = cpumask_first(diff);
470 cpumask_set_cpu(cpu, &set->used);
473 cpumask_set_cpu(cpu, &msix->mask);
474 dd_dev_info(dd, "IRQ vector: %u, type %s %s -> cpu: %d\n",
475 msix->msix.vector, irq_type_names[msix->type],
477 irq_set_affinity_hint(msix->msix.vector, &msix->mask);
479 if (msix->type == IRQ_SDMA) {
481 hfi1_setup_sdma_notifier(msix);
484 free_cpumask_var(diff);
488 int hfi1_get_irq_affinity(struct hfi1_devdata *dd, struct hfi1_msix_entry *msix)
492 mutex_lock(&node_affinity.lock);
493 ret = get_irq_affinity(dd, msix);
494 mutex_unlock(&node_affinity.lock);
498 void hfi1_put_irq_affinity(struct hfi1_devdata *dd,
499 struct hfi1_msix_entry *msix)
501 struct cpu_mask_set *set = NULL;
502 struct hfi1_ctxtdata *rcd;
503 struct hfi1_affinity_node *entry;
505 mutex_lock(&node_affinity.lock);
506 entry = node_affinity_lookup(dd->node);
508 switch (msix->type) {
510 set = &entry->def_intr;
511 hfi1_cleanup_sdma_notifier(msix);
514 /* Don't do accounting for general contexts */
517 rcd = (struct hfi1_ctxtdata *)msix->arg;
518 /* Don't do accounting for control contexts */
519 if (rcd->ctxt != HFI1_CTRL_CTXT)
520 set = &entry->rcv_intr;
523 mutex_unlock(&node_affinity.lock);
528 cpumask_andnot(&set->used, &set->used, &msix->mask);
529 if (cpumask_empty(&set->used) && set->gen) {
531 cpumask_copy(&set->used, &set->mask);
535 irq_set_affinity_hint(msix->msix.vector, NULL);
536 cpumask_clear(&msix->mask);
537 mutex_unlock(&node_affinity.lock);
540 /* This should be called with node_affinity.lock held */
541 static void find_hw_thread_mask(uint hw_thread_no, cpumask_var_t hw_thread_mask,
542 struct hfi1_affinity_node_list *affinity)
544 int possible, curr_cpu, i;
545 uint num_cores_per_socket = node_affinity.num_online_cpus /
546 affinity->num_core_siblings /
547 node_affinity.num_online_nodes;
549 cpumask_copy(hw_thread_mask, &affinity->proc.mask);
550 if (affinity->num_core_siblings > 0) {
551 /* Removing other siblings not needed for now */
552 possible = cpumask_weight(hw_thread_mask);
553 curr_cpu = cpumask_first(hw_thread_mask);
555 i < num_cores_per_socket * node_affinity.num_online_nodes;
557 curr_cpu = cpumask_next(curr_cpu, hw_thread_mask);
559 for (; i < possible; i++) {
560 cpumask_clear_cpu(curr_cpu, hw_thread_mask);
561 curr_cpu = cpumask_next(curr_cpu, hw_thread_mask);
564 /* Identifying correct HW threads within physical cores */
565 cpumask_shift_left(hw_thread_mask, hw_thread_mask,
566 num_cores_per_socket *
567 node_affinity.num_online_nodes *
572 int hfi1_get_proc_affinity(int node)
574 int cpu = -1, ret, i;
575 struct hfi1_affinity_node *entry;
576 cpumask_var_t diff, hw_thread_mask, available_mask, intrs_mask;
577 const struct cpumask *node_mask,
578 *proc_mask = tsk_cpus_allowed(current);
579 struct hfi1_affinity_node_list *affinity = &node_affinity;
580 struct cpu_mask_set *set = &affinity->proc;
583 * check whether process/context affinity has already
586 if (cpumask_weight(proc_mask) == 1) {
587 hfi1_cdbg(PROC, "PID %u %s affinity set to CPU %*pbl",
588 current->pid, current->comm,
589 cpumask_pr_args(proc_mask));
591 * Mark the pre-set CPU as used. This is atomic so we don't
594 cpu = cpumask_first(proc_mask);
595 cpumask_set_cpu(cpu, &set->used);
597 } else if (cpumask_weight(proc_mask) < cpumask_weight(&set->mask)) {
598 hfi1_cdbg(PROC, "PID %u %s affinity set to CPU set(s) %*pbl",
599 current->pid, current->comm,
600 cpumask_pr_args(proc_mask));
605 * The process does not have a preset CPU affinity so find one to
606 * recommend using the following algorithm:
608 * For each user process that is opening a context on HFI Y:
609 * a) If all cores are filled, reinitialize the bitmask
610 * b) Fill real cores first, then HT cores (First set of HT
611 * cores on all physical cores, then second set of HT core,
612 * and, so on) in the following order:
614 * 1. Same NUMA node as HFI Y and not running an IRQ
616 * 2. Same NUMA node as HFI Y and running an IRQ handler
617 * 3. Different NUMA node to HFI Y and not running an IRQ
619 * 4. Different NUMA node to HFI Y and running an IRQ
621 * c) Mark core as filled in the bitmask. As user processes are
622 * done, clear cores from the bitmask.
625 ret = zalloc_cpumask_var(&diff, GFP_KERNEL);
628 ret = zalloc_cpumask_var(&hw_thread_mask, GFP_KERNEL);
631 ret = zalloc_cpumask_var(&available_mask, GFP_KERNEL);
633 goto free_hw_thread_mask;
634 ret = zalloc_cpumask_var(&intrs_mask, GFP_KERNEL);
636 goto free_available_mask;
638 mutex_lock(&affinity->lock);
640 * If we've used all available HW threads, clear the mask and start
643 if (cpumask_equal(&set->mask, &set->used)) {
645 cpumask_clear(&set->used);
649 * If NUMA node has CPUs used by interrupt handlers, include them in the
650 * interrupt handler mask.
652 entry = node_affinity_lookup(node);
654 cpumask_copy(intrs_mask, (entry->def_intr.gen ?
655 &entry->def_intr.mask :
656 &entry->def_intr.used));
657 cpumask_or(intrs_mask, intrs_mask, (entry->rcv_intr.gen ?
658 &entry->rcv_intr.mask :
659 &entry->rcv_intr.used));
660 cpumask_or(intrs_mask, intrs_mask, &entry->general_intr_mask);
662 hfi1_cdbg(PROC, "CPUs used by interrupts: %*pbl",
663 cpumask_pr_args(intrs_mask));
665 cpumask_copy(hw_thread_mask, &set->mask);
668 * If HT cores are enabled, identify which HW threads within the
669 * physical cores should be used.
671 if (affinity->num_core_siblings > 0) {
672 for (i = 0; i < affinity->num_core_siblings; i++) {
673 find_hw_thread_mask(i, hw_thread_mask, affinity);
676 * If there's at least one available core for this HW
677 * thread number, stop looking for a core.
679 * diff will always be not empty at least once in this
680 * loop as the used mask gets reset when
681 * (set->mask == set->used) before this loop.
683 cpumask_andnot(diff, hw_thread_mask, &set->used);
684 if (!cpumask_empty(diff))
688 hfi1_cdbg(PROC, "Same available HW thread on all physical CPUs: %*pbl",
689 cpumask_pr_args(hw_thread_mask));
691 node_mask = cpumask_of_node(node);
692 hfi1_cdbg(PROC, "Device on NUMA %u, CPUs %*pbl", node,
693 cpumask_pr_args(node_mask));
695 /* Get cpumask of available CPUs on preferred NUMA */
696 cpumask_and(available_mask, hw_thread_mask, node_mask);
697 cpumask_andnot(available_mask, available_mask, &set->used);
698 hfi1_cdbg(PROC, "Available CPUs on NUMA %u: %*pbl", node,
699 cpumask_pr_args(available_mask));
702 * At first, we don't want to place processes on the same
703 * CPUs as interrupt handlers. Then, CPUs running interrupt
706 * 1) If diff is not empty, then there are CPUs not running
707 * non-interrupt handlers available, so diff gets copied
708 * over to available_mask.
709 * 2) If diff is empty, then all CPUs not running interrupt
710 * handlers are taken, so available_mask contains all
711 * available CPUs running interrupt handlers.
712 * 3) If available_mask is empty, then all CPUs on the
713 * preferred NUMA node are taken, so other NUMA nodes are
714 * used for process assignments using the same method as
715 * the preferred NUMA node.
717 cpumask_andnot(diff, available_mask, intrs_mask);
718 if (!cpumask_empty(diff))
719 cpumask_copy(available_mask, diff);
721 /* If we don't have CPUs on the preferred node, use other NUMA nodes */
722 if (cpumask_empty(available_mask)) {
723 cpumask_andnot(available_mask, hw_thread_mask, &set->used);
724 /* Excluding preferred NUMA cores */
725 cpumask_andnot(available_mask, available_mask, node_mask);
727 "Preferred NUMA node cores are taken, cores available in other NUMA nodes: %*pbl",
728 cpumask_pr_args(available_mask));
731 * At first, we don't want to place processes on the same
732 * CPUs as interrupt handlers.
734 cpumask_andnot(diff, available_mask, intrs_mask);
735 if (!cpumask_empty(diff))
736 cpumask_copy(available_mask, diff);
738 hfi1_cdbg(PROC, "Possible CPUs for process: %*pbl",
739 cpumask_pr_args(available_mask));
741 cpu = cpumask_first(available_mask);
742 if (cpu >= nr_cpu_ids) /* empty */
745 cpumask_set_cpu(cpu, &set->used);
747 mutex_unlock(&affinity->lock);
748 hfi1_cdbg(PROC, "Process assigned to CPU %d", cpu);
750 free_cpumask_var(intrs_mask);
752 free_cpumask_var(available_mask);
754 free_cpumask_var(hw_thread_mask);
756 free_cpumask_var(diff);
761 void hfi1_put_proc_affinity(int cpu)
763 struct hfi1_affinity_node_list *affinity = &node_affinity;
764 struct cpu_mask_set *set = &affinity->proc;
769 mutex_lock(&affinity->lock);
770 cpumask_clear_cpu(cpu, &set->used);
771 hfi1_cdbg(PROC, "Returning CPU %d for future process assignment", cpu);
772 if (cpumask_empty(&set->used) && set->gen) {
774 cpumask_copy(&set->used, &set->mask);
776 mutex_unlock(&affinity->lock);