2 This file is provided under a dual BSD/GPLv2 license. When using or
3 redistributing this file, you may do so under either license.
6 Copyright(c) 2014 Intel Corporation.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of version 2 of the GNU General Public License as
9 published by the Free Software Foundation.
11 This program is distributed in the hope that it will be useful, but
12 WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 General Public License for more details.
20 Copyright(c) 2014 Intel Corporation.
21 Redistribution and use in source and binary forms, with or without
22 modification, are permitted provided that the following conditions
25 * Redistributions of source code must retain the above copyright
26 notice, this list of conditions and the following disclaimer.
27 * Redistributions in binary form must reproduce the above copyright
28 notice, this list of conditions and the following disclaimer in
29 the documentation and/or other materials provided with the
31 * Neither the name of Intel Corporation nor the names of its
32 contributors may be used to endorse or promote products derived
33 from this software without specific prior written permission.
35 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
36 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
37 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
38 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
39 OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
40 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
41 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
42 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
43 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
44 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
45 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
47 #include <linux/kernel.h>
48 #include <linux/init.h>
49 #include <linux/types.h>
50 #include <linux/pci.h>
51 #include <linux/slab.h>
52 #include <linux/errno.h>
53 #include <linux/interrupt.h>
54 #include <linux/workqueue.h>
55 #include "adf_accel_devices.h"
56 #include "adf_common_drv.h"
58 #include "adf_cfg_strings.h"
59 #include "adf_cfg_common.h"
60 #include "adf_transport_access_macros.h"
61 #include "adf_transport_internal.h"
62 #include "adf_pf2vf_msg.h"
64 #define ADF_VINTSOU_OFFSET 0x204
65 #define ADF_VINTSOU_BUN BIT(0)
66 #define ADF_VINTSOU_PF2VF BIT(1)
68 static struct workqueue_struct *adf_vf_stop_wq;
70 struct adf_vf_stop_data {
71 struct adf_accel_dev *accel_dev;
72 struct work_struct work;
75 static int adf_enable_msi(struct adf_accel_dev *accel_dev)
77 struct adf_accel_pci *pci_dev_info = &accel_dev->accel_pci_dev;
78 int stat = pci_enable_msi(pci_dev_info->pci_dev);
81 dev_err(&GET_DEV(accel_dev),
82 "Failed to enable MSI interrupts\n");
86 accel_dev->vf.irq_name = kzalloc(ADF_MAX_MSIX_VECTOR_NAME, GFP_KERNEL);
87 if (!accel_dev->vf.irq_name)
93 static void adf_disable_msi(struct adf_accel_dev *accel_dev)
95 struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
97 kfree(accel_dev->vf.irq_name);
98 pci_disable_msi(pdev);
101 static void adf_dev_stop_async(struct work_struct *work)
103 struct adf_vf_stop_data *stop_data =
104 container_of(work, struct adf_vf_stop_data, work);
105 struct adf_accel_dev *accel_dev = stop_data->accel_dev;
107 adf_dev_stop(accel_dev);
108 adf_dev_shutdown(accel_dev);
110 /* Re-enable PF2VF interrupts */
111 adf_enable_pf2vf_interrupts(accel_dev);
115 static void adf_pf2vf_bh_handler(void *data)
117 struct adf_accel_dev *accel_dev = data;
118 struct adf_hw_device_data *hw_data = accel_dev->hw_device;
119 struct adf_bar *pmisc =
120 &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)];
121 void __iomem *pmisc_bar_addr = pmisc->virt_addr;
124 /* Read the message from PF */
125 msg = ADF_CSR_RD(pmisc_bar_addr, hw_data->get_pf2vf_offset(0));
126 if (!(msg & ADF_PF2VF_INT)) {
127 dev_info(&GET_DEV(accel_dev),
128 "Spurious PF2VF interrupt, msg %X. Ignored\n", msg);
132 if (!(msg & ADF_PF2VF_MSGORIGIN_SYSTEM))
133 /* Ignore legacy non-system (non-kernel) PF2VF messages */
136 switch ((msg & ADF_PF2VF_MSGTYPE_MASK) >> ADF_PF2VF_MSGTYPE_SHIFT) {
137 case ADF_PF2VF_MSGTYPE_RESTARTING: {
138 struct adf_vf_stop_data *stop_data;
140 dev_dbg(&GET_DEV(accel_dev),
141 "Restarting msg received from PF 0x%x\n", msg);
143 clear_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status);
145 stop_data = kzalloc(sizeof(*stop_data), GFP_ATOMIC);
147 dev_err(&GET_DEV(accel_dev),
148 "Couldn't schedule stop for vf_%d\n",
149 accel_dev->accel_id);
152 stop_data->accel_dev = accel_dev;
153 INIT_WORK(&stop_data->work, adf_dev_stop_async);
154 queue_work(adf_vf_stop_wq, &stop_data->work);
155 /* To ack, clear the PF2VFINT bit */
157 ADF_CSR_WR(pmisc_bar_addr, hw_data->get_pf2vf_offset(0), msg);
160 case ADF_PF2VF_MSGTYPE_VERSION_RESP:
161 dev_dbg(&GET_DEV(accel_dev),
162 "Version resp received from PF 0x%x\n", msg);
163 accel_dev->vf.pf_version =
164 (msg & ADF_PF2VF_VERSION_RESP_VERS_MASK) >>
165 ADF_PF2VF_VERSION_RESP_VERS_SHIFT;
166 accel_dev->vf.compatible =
167 (msg & ADF_PF2VF_VERSION_RESP_RESULT_MASK) >>
168 ADF_PF2VF_VERSION_RESP_RESULT_SHIFT;
169 complete(&accel_dev->vf.iov_msg_completion);
175 /* To ack, clear the PF2VFINT bit */
177 ADF_CSR_WR(pmisc_bar_addr, hw_data->get_pf2vf_offset(0), msg);
180 /* Re-enable PF2VF interrupts */
181 adf_enable_pf2vf_interrupts(accel_dev);
184 dev_err(&GET_DEV(accel_dev),
185 "Unknown message from PF (0x%x); leaving PF2VF ints disabled\n",
189 static int adf_setup_pf2vf_bh(struct adf_accel_dev *accel_dev)
191 tasklet_init(&accel_dev->vf.pf2vf_bh_tasklet,
192 (void *)adf_pf2vf_bh_handler, (unsigned long)accel_dev);
194 mutex_init(&accel_dev->vf.vf2pf_lock);
198 static void adf_cleanup_pf2vf_bh(struct adf_accel_dev *accel_dev)
200 tasklet_disable(&accel_dev->vf.pf2vf_bh_tasklet);
201 tasklet_kill(&accel_dev->vf.pf2vf_bh_tasklet);
202 mutex_destroy(&accel_dev->vf.vf2pf_lock);
205 static irqreturn_t adf_isr(int irq, void *privdata)
207 struct adf_accel_dev *accel_dev = privdata;
208 struct adf_hw_device_data *hw_data = accel_dev->hw_device;
209 struct adf_bar *pmisc =
210 &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)];
211 void __iomem *pmisc_bar_addr = pmisc->virt_addr;
212 bool handled = false;
215 /* Read VF INT source CSR to determine the source of VF interrupt */
216 v_int = ADF_CSR_RD(pmisc_bar_addr, ADF_VINTSOU_OFFSET);
218 /* Check for PF2VF interrupt */
219 if (v_int & ADF_VINTSOU_PF2VF) {
220 /* Disable PF to VF interrupt */
221 adf_disable_pf2vf_interrupts(accel_dev);
223 /* Schedule tasklet to handle interrupt BH */
224 tasklet_hi_schedule(&accel_dev->vf.pf2vf_bh_tasklet);
228 /* Check bundle interrupt */
229 if (v_int & ADF_VINTSOU_BUN) {
230 struct adf_etr_data *etr_data = accel_dev->transport;
231 struct adf_etr_bank_data *bank = &etr_data->banks[0];
233 /* Disable Flag and Coalesce Ring Interrupts */
234 WRITE_CSR_INT_FLAG_AND_COL(bank->csr_addr, bank->bank_number,
236 tasklet_hi_schedule(&bank->resp_handler);
240 return handled ? IRQ_HANDLED : IRQ_NONE;
243 static int adf_request_msi_irq(struct adf_accel_dev *accel_dev)
245 struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
249 snprintf(accel_dev->vf.irq_name, ADF_MAX_MSIX_VECTOR_NAME,
250 "qat_%02x:%02d.%02d", pdev->bus->number, PCI_SLOT(pdev->devfn),
251 PCI_FUNC(pdev->devfn));
252 ret = request_irq(pdev->irq, adf_isr, 0, accel_dev->vf.irq_name,
255 dev_err(&GET_DEV(accel_dev), "failed to enable irq for %s\n",
256 accel_dev->vf.irq_name);
259 cpu = accel_dev->accel_id % num_online_cpus();
260 irq_set_affinity_hint(pdev->irq, get_cpu_mask(cpu));
265 static int adf_setup_bh(struct adf_accel_dev *accel_dev)
267 struct adf_etr_data *priv_data = accel_dev->transport;
269 tasklet_init(&priv_data->banks[0].resp_handler, adf_response_handler,
270 (unsigned long)priv_data->banks);
274 static void adf_cleanup_bh(struct adf_accel_dev *accel_dev)
276 struct adf_etr_data *priv_data = accel_dev->transport;
278 tasklet_disable(&priv_data->banks[0].resp_handler);
279 tasklet_kill(&priv_data->banks[0].resp_handler);
283 * adf_vf_isr_resource_free() - Free IRQ for acceleration device
284 * @accel_dev: Pointer to acceleration device.
286 * Function frees interrupts for acceleration device virtual function.
288 void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev)
290 struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
292 irq_set_affinity_hint(pdev->irq, NULL);
293 free_irq(pdev->irq, (void *)accel_dev);
294 adf_cleanup_bh(accel_dev);
295 adf_cleanup_pf2vf_bh(accel_dev);
296 adf_disable_msi(accel_dev);
298 EXPORT_SYMBOL_GPL(adf_vf_isr_resource_free);
301 * adf_vf_isr_resource_alloc() - Allocate IRQ for acceleration device
302 * @accel_dev: Pointer to acceleration device.
304 * Function allocates interrupts for acceleration device virtual function.
306 * Return: 0 on success, error code otherwise.
308 int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev)
310 if (adf_enable_msi(accel_dev))
313 if (adf_setup_pf2vf_bh(accel_dev))
314 goto err_disable_msi;
316 if (adf_setup_bh(accel_dev))
317 goto err_cleanup_pf2vf_bh;
319 if (adf_request_msi_irq(accel_dev))
325 adf_cleanup_bh(accel_dev);
327 err_cleanup_pf2vf_bh:
328 adf_cleanup_pf2vf_bh(accel_dev);
331 adf_disable_msi(accel_dev);
336 EXPORT_SYMBOL_GPL(adf_vf_isr_resource_alloc);
338 int __init adf_init_vf_wq(void)
340 adf_vf_stop_wq = alloc_workqueue("adf_vf_stop_wq", WQ_MEM_RECLAIM, 0);
342 return !adf_vf_stop_wq ? -EFAULT : 0;
345 void adf_exit_vf_wq(void)
348 destroy_workqueue(adf_vf_stop_wq);
350 adf_vf_stop_wq = NULL;