2 * ADE7758 Poly Phase Multifunction Energy Metering IC driver
4 * Copyright 2010-2011 Analog Devices Inc.
6 * Licensed under the GPL-2.
9 #include <linux/interrupt.h>
10 #include <linux/irq.h>
11 #include <linux/delay.h>
12 #include <linux/mutex.h>
13 #include <linux/device.h>
14 #include <linux/kernel.h>
15 #include <linux/spi/spi.h>
16 #include <linux/slab.h>
17 #include <linux/sysfs.h>
18 #include <linux/list.h>
19 #include <linux/module.h>
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include <linux/iio/buffer.h>
27 int ade7758_spi_write_reg_8(struct device *dev,
32 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
33 struct ade7758_state *st = iio_priv(indio_dev);
35 mutex_lock(&st->buf_lock);
36 st->tx[0] = ADE7758_WRITE_REG(reg_address);
39 ret = spi_write(st->us, st->tx, 2);
40 mutex_unlock(&st->buf_lock);
45 static int ade7758_spi_write_reg_16(struct device *dev,
50 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
51 struct ade7758_state *st = iio_priv(indio_dev);
52 struct spi_transfer xfers[] = {
60 mutex_lock(&st->buf_lock);
61 st->tx[0] = ADE7758_WRITE_REG(reg_address);
62 st->tx[1] = (value >> 8) & 0xFF;
63 st->tx[2] = value & 0xFF;
65 ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
66 mutex_unlock(&st->buf_lock);
71 static int ade7758_spi_write_reg_24(struct device *dev,
76 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
77 struct ade7758_state *st = iio_priv(indio_dev);
78 struct spi_transfer xfers[] = {
86 mutex_lock(&st->buf_lock);
87 st->tx[0] = ADE7758_WRITE_REG(reg_address);
88 st->tx[1] = (value >> 16) & 0xFF;
89 st->tx[2] = (value >> 8) & 0xFF;
90 st->tx[3] = value & 0xFF;
92 ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
93 mutex_unlock(&st->buf_lock);
98 int ade7758_spi_read_reg_8(struct device *dev,
102 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
103 struct ade7758_state *st = iio_priv(indio_dev);
105 struct spi_transfer xfers[] = {
113 .tx_buf = &st->tx[1],
120 mutex_lock(&st->buf_lock);
121 st->tx[0] = ADE7758_READ_REG(reg_address);
124 ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
126 dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
133 mutex_unlock(&st->buf_lock);
137 static int ade7758_spi_read_reg_16(struct device *dev,
141 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
142 struct ade7758_state *st = iio_priv(indio_dev);
144 struct spi_transfer xfers[] = {
152 .tx_buf = &st->tx[1],
160 mutex_lock(&st->buf_lock);
161 st->tx[0] = ADE7758_READ_REG(reg_address);
165 ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
167 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
172 *val = (st->rx[0] << 8) | st->rx[1];
175 mutex_unlock(&st->buf_lock);
179 static int ade7758_spi_read_reg_24(struct device *dev,
183 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
184 struct ade7758_state *st = iio_priv(indio_dev);
186 struct spi_transfer xfers[] = {
194 .tx_buf = &st->tx[1],
201 mutex_lock(&st->buf_lock);
202 st->tx[0] = ADE7758_READ_REG(reg_address);
207 ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
209 dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
213 *val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2];
216 mutex_unlock(&st->buf_lock);
220 static ssize_t ade7758_read_8bit(struct device *dev,
221 struct device_attribute *attr,
226 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
228 ret = ade7758_spi_read_reg_8(dev, this_attr->address, &val);
232 return sprintf(buf, "%u\n", val);
235 static ssize_t ade7758_read_16bit(struct device *dev,
236 struct device_attribute *attr,
241 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
243 ret = ade7758_spi_read_reg_16(dev, this_attr->address, &val);
247 return sprintf(buf, "%u\n", val);
250 static ssize_t ade7758_read_24bit(struct device *dev,
251 struct device_attribute *attr,
256 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
258 ret = ade7758_spi_read_reg_24(dev, this_attr->address, &val);
262 return sprintf(buf, "%u\n", val & 0xFFFFFF);
265 static ssize_t ade7758_write_8bit(struct device *dev,
266 struct device_attribute *attr,
270 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
274 ret = kstrtou8(buf, 10, &val);
277 ret = ade7758_spi_write_reg_8(dev, this_attr->address, val);
280 return ret ? ret : len;
283 static ssize_t ade7758_write_16bit(struct device *dev,
284 struct device_attribute *attr,
288 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
292 ret = kstrtou16(buf, 10, &val);
295 ret = ade7758_spi_write_reg_16(dev, this_attr->address, val);
298 return ret ? ret : len;
301 static int ade7758_reset(struct device *dev)
306 ret = ade7758_spi_read_reg_8(dev, ADE7758_OPMODE, &val);
308 dev_err(dev, "Failed to read opmode reg\n");
311 val |= BIT(6); /* Software Chip Reset */
312 ret = ade7758_spi_write_reg_8(dev, ADE7758_OPMODE, val);
314 dev_err(dev, "Failed to write opmode reg\n");
318 static IIO_DEV_ATTR_VPEAK(S_IWUSR | S_IRUGO,
322 static IIO_DEV_ATTR_IPEAK(S_IWUSR | S_IRUGO,
326 static IIO_DEV_ATTR_APHCAL(S_IWUSR | S_IRUGO,
330 static IIO_DEV_ATTR_BPHCAL(S_IWUSR | S_IRUGO,
334 static IIO_DEV_ATTR_CPHCAL(S_IWUSR | S_IRUGO,
338 static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO,
342 static IIO_DEV_ATTR_VADIV(S_IWUSR | S_IRUGO,
346 static IIO_DEV_ATTR_AIRMS(S_IRUGO,
350 static IIO_DEV_ATTR_BIRMS(S_IRUGO,
354 static IIO_DEV_ATTR_CIRMS(S_IRUGO,
358 static IIO_DEV_ATTR_AVRMS(S_IRUGO,
362 static IIO_DEV_ATTR_BVRMS(S_IRUGO,
366 static IIO_DEV_ATTR_CVRMS(S_IRUGO,
370 static IIO_DEV_ATTR_AIRMSOS(S_IWUSR | S_IRUGO,
374 static IIO_DEV_ATTR_BIRMSOS(S_IWUSR | S_IRUGO,
378 static IIO_DEV_ATTR_CIRMSOS(S_IWUSR | S_IRUGO,
382 static IIO_DEV_ATTR_AVRMSOS(S_IWUSR | S_IRUGO,
386 static IIO_DEV_ATTR_BVRMSOS(S_IWUSR | S_IRUGO,
390 static IIO_DEV_ATTR_CVRMSOS(S_IWUSR | S_IRUGO,
394 static IIO_DEV_ATTR_AIGAIN(S_IWUSR | S_IRUGO,
398 static IIO_DEV_ATTR_BIGAIN(S_IWUSR | S_IRUGO,
402 static IIO_DEV_ATTR_CIGAIN(S_IWUSR | S_IRUGO,
406 static IIO_DEV_ATTR_AVRMSGAIN(S_IWUSR | S_IRUGO,
410 static IIO_DEV_ATTR_BVRMSGAIN(S_IWUSR | S_IRUGO,
414 static IIO_DEV_ATTR_CVRMSGAIN(S_IWUSR | S_IRUGO,
419 int ade7758_set_irq(struct device *dev, bool enable)
424 ret = ade7758_spi_read_reg_24(dev, ADE7758_MASK, &irqen);
429 irqen |= BIT(16); /* Enables an interrupt when a data is
430 present in the waveform register */
434 ret = ade7758_spi_write_reg_24(dev, ADE7758_MASK, irqen);
442 /* Power down the device */
443 static int ade7758_stop_device(struct device *dev)
448 ret = ade7758_spi_read_reg_8(dev, ADE7758_OPMODE, &val);
450 dev_err(dev, "Failed to read opmode reg\n");
453 val |= 7 << 3; /* ADE7758 powered down */
454 ret = ade7758_spi_write_reg_8(dev, ADE7758_OPMODE, val);
456 dev_err(dev, "Failed to write opmode reg\n");
460 static int ade7758_initial_setup(struct iio_dev *indio_dev)
462 struct ade7758_state *st = iio_priv(indio_dev);
463 struct device *dev = &indio_dev->dev;
466 /* use low spi speed for init */
467 st->us->mode = SPI_MODE_1;
471 ret = ade7758_set_irq(dev, false);
473 dev_err(dev, "disable irq failed");
478 msleep(ADE7758_STARTUP_DELAY);
484 static ssize_t ade7758_read_frequency(struct device *dev,
485 struct device_attribute *attr,
492 ret = ade7758_spi_read_reg_8(dev,
499 sps = 26040 / (1 << t);
501 return sprintf(buf, "%d SPS\n", sps);
504 static ssize_t ade7758_write_frequency(struct device *dev,
505 struct device_attribute *attr,
509 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
514 ret = kstrtou16(buf, 10, &val);
518 mutex_lock(&indio_dev->mlock);
538 ret = ade7758_spi_read_reg_8(dev,
547 ret = ade7758_spi_write_reg_8(dev,
552 mutex_unlock(&indio_dev->mlock);
554 return ret ? ret : len;
557 static IIO_DEV_ATTR_TEMP_RAW(ade7758_read_8bit);
558 static IIO_CONST_ATTR(in_temp_offset, "129 C");
559 static IIO_CONST_ATTR(in_temp_scale, "4 C");
561 static IIO_DEV_ATTR_AWATTHR(ade7758_read_16bit,
563 static IIO_DEV_ATTR_BWATTHR(ade7758_read_16bit,
565 static IIO_DEV_ATTR_CWATTHR(ade7758_read_16bit,
567 static IIO_DEV_ATTR_AVARHR(ade7758_read_16bit,
569 static IIO_DEV_ATTR_BVARHR(ade7758_read_16bit,
571 static IIO_DEV_ATTR_CVARHR(ade7758_read_16bit,
573 static IIO_DEV_ATTR_AVAHR(ade7758_read_16bit,
575 static IIO_DEV_ATTR_BVAHR(ade7758_read_16bit,
577 static IIO_DEV_ATTR_CVAHR(ade7758_read_16bit,
580 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
581 ade7758_read_frequency,
582 ade7758_write_frequency);
584 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("26040 13020 6510 3255");
586 static struct attribute *ade7758_attributes[] = {
587 &iio_dev_attr_in_temp_raw.dev_attr.attr,
588 &iio_const_attr_in_temp_offset.dev_attr.attr,
589 &iio_const_attr_in_temp_scale.dev_attr.attr,
590 &iio_dev_attr_sampling_frequency.dev_attr.attr,
591 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
592 &iio_dev_attr_awatthr.dev_attr.attr,
593 &iio_dev_attr_bwatthr.dev_attr.attr,
594 &iio_dev_attr_cwatthr.dev_attr.attr,
595 &iio_dev_attr_avarhr.dev_attr.attr,
596 &iio_dev_attr_bvarhr.dev_attr.attr,
597 &iio_dev_attr_cvarhr.dev_attr.attr,
598 &iio_dev_attr_avahr.dev_attr.attr,
599 &iio_dev_attr_bvahr.dev_attr.attr,
600 &iio_dev_attr_cvahr.dev_attr.attr,
601 &iio_dev_attr_vpeak.dev_attr.attr,
602 &iio_dev_attr_ipeak.dev_attr.attr,
603 &iio_dev_attr_aphcal.dev_attr.attr,
604 &iio_dev_attr_bphcal.dev_attr.attr,
605 &iio_dev_attr_cphcal.dev_attr.attr,
606 &iio_dev_attr_wdiv.dev_attr.attr,
607 &iio_dev_attr_vadiv.dev_attr.attr,
608 &iio_dev_attr_airms.dev_attr.attr,
609 &iio_dev_attr_birms.dev_attr.attr,
610 &iio_dev_attr_cirms.dev_attr.attr,
611 &iio_dev_attr_avrms.dev_attr.attr,
612 &iio_dev_attr_bvrms.dev_attr.attr,
613 &iio_dev_attr_cvrms.dev_attr.attr,
614 &iio_dev_attr_aigain.dev_attr.attr,
615 &iio_dev_attr_bigain.dev_attr.attr,
616 &iio_dev_attr_cigain.dev_attr.attr,
617 &iio_dev_attr_avrmsgain.dev_attr.attr,
618 &iio_dev_attr_bvrmsgain.dev_attr.attr,
619 &iio_dev_attr_cvrmsgain.dev_attr.attr,
620 &iio_dev_attr_airmsos.dev_attr.attr,
621 &iio_dev_attr_birmsos.dev_attr.attr,
622 &iio_dev_attr_cirmsos.dev_attr.attr,
623 &iio_dev_attr_avrmsos.dev_attr.attr,
624 &iio_dev_attr_bvrmsos.dev_attr.attr,
625 &iio_dev_attr_cvrmsos.dev_attr.attr,
629 static const struct attribute_group ade7758_attribute_group = {
630 .attrs = ade7758_attributes,
633 static const struct iio_chan_spec ade7758_channels[] = {
638 .address = AD7758_WT(AD7758_PHASE_A, AD7758_VOLTAGE),
649 .address = AD7758_WT(AD7758_PHASE_A, AD7758_CURRENT),
660 .extend_name = "apparent",
661 .address = AD7758_WT(AD7758_PHASE_A, AD7758_APP_PWR),
672 .extend_name = "active",
673 .address = AD7758_WT(AD7758_PHASE_A, AD7758_ACT_PWR),
684 .extend_name = "reactive",
685 .address = AD7758_WT(AD7758_PHASE_A, AD7758_REACT_PWR),
696 .address = AD7758_WT(AD7758_PHASE_B, AD7758_VOLTAGE),
707 .address = AD7758_WT(AD7758_PHASE_B, AD7758_CURRENT),
718 .extend_name = "apparent",
719 .address = AD7758_WT(AD7758_PHASE_B, AD7758_APP_PWR),
730 .extend_name = "active",
731 .address = AD7758_WT(AD7758_PHASE_B, AD7758_ACT_PWR),
742 .extend_name = "reactive",
743 .address = AD7758_WT(AD7758_PHASE_B, AD7758_REACT_PWR),
754 .address = AD7758_WT(AD7758_PHASE_C, AD7758_VOLTAGE),
765 .address = AD7758_WT(AD7758_PHASE_C, AD7758_CURRENT),
776 .extend_name = "apparent",
777 .address = AD7758_WT(AD7758_PHASE_C, AD7758_APP_PWR),
788 .extend_name = "active",
789 .address = AD7758_WT(AD7758_PHASE_C, AD7758_ACT_PWR),
800 .extend_name = "reactive",
801 .address = AD7758_WT(AD7758_PHASE_C, AD7758_REACT_PWR),
809 IIO_CHAN_SOFT_TIMESTAMP(15),
812 static const struct iio_info ade7758_info = {
813 .attrs = &ade7758_attribute_group,
814 .driver_module = THIS_MODULE,
817 static int ade7758_probe(struct spi_device *spi)
820 struct ade7758_state *st;
821 struct iio_dev *indio_dev;
823 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
827 st = iio_priv(indio_dev);
828 /* this is only used for removal purposes */
829 spi_set_drvdata(spi, indio_dev);
831 /* Allocate the comms buffers */
832 st->rx = kcalloc(ADE7758_MAX_RX, sizeof(*st->rx), GFP_KERNEL);
835 st->tx = kcalloc(ADE7758_MAX_TX, sizeof(*st->tx), GFP_KERNEL);
841 mutex_init(&st->buf_lock);
843 indio_dev->name = spi->dev.driver->name;
844 indio_dev->dev.parent = &spi->dev;
845 indio_dev->info = &ade7758_info;
846 indio_dev->modes = INDIO_DIRECT_MODE;
847 indio_dev->channels = ade7758_channels;
848 indio_dev->num_channels = ARRAY_SIZE(ade7758_channels);
850 ret = ade7758_configure_ring(indio_dev);
854 /* Get the device into a sane initial state */
855 ret = ade7758_initial_setup(indio_dev);
857 goto error_unreg_ring_funcs;
860 ret = ade7758_probe_trigger(indio_dev);
862 goto error_unreg_ring_funcs;
865 ret = iio_device_register(indio_dev);
867 goto error_remove_trigger;
871 error_remove_trigger:
873 ade7758_remove_trigger(indio_dev);
874 error_unreg_ring_funcs:
875 ade7758_unconfigure_ring(indio_dev);
883 static int ade7758_remove(struct spi_device *spi)
885 struct iio_dev *indio_dev = spi_get_drvdata(spi);
886 struct ade7758_state *st = iio_priv(indio_dev);
888 iio_device_unregister(indio_dev);
889 ade7758_stop_device(&indio_dev->dev);
890 ade7758_remove_trigger(indio_dev);
891 ade7758_unconfigure_ring(indio_dev);
898 static const struct spi_device_id ade7758_id[] = {
902 MODULE_DEVICE_TABLE(spi, ade7758_id);
904 static struct spi_driver ade7758_driver = {
908 .probe = ade7758_probe,
909 .remove = ade7758_remove,
910 .id_table = ade7758_id,
912 module_spi_driver(ade7758_driver);
914 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
915 MODULE_DESCRIPTION("Analog Devices ADE7758 Polyphase Multifunction Energy Metering IC Driver");
916 MODULE_LICENSE("GPL v2");