1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "IRQ chip support"
10 select IRQ_DOMAIN_HIERARCHY
11 select GENERIC_IRQ_MULTI_HANDLER
12 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
22 default 2 if ARCH_REALVIEW
36 select GENERIC_IRQ_MULTI_HANDLER
37 select IRQ_DOMAIN_HIERARCHY
38 select PARTITION_PERCPU
39 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
43 select GENERIC_MSI_IRQ_DOMAIN
46 config ARM_GIC_V3_ITS_PCI
48 depends on ARM_GIC_V3_ITS
51 default ARM_GIC_V3_ITS
53 config ARM_GIC_V3_ITS_FSL_MC
55 depends on ARM_GIC_V3_ITS
57 default ARM_GIC_V3_ITS
61 select IRQ_DOMAIN_HIERARCHY
62 select GENERIC_IRQ_CHIP
67 select GENERIC_IRQ_MULTI_HANDLER
71 default 4 if ARCH_S5PV210
75 The maximum number of VICs available in the system, for
78 config ARMADA_370_XP_IRQ
80 select GENERIC_IRQ_CHIP
82 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
88 select GENERIC_IRQ_CHIP
91 bool "Amazon's Annapurna Labs Fabric Interrupt Controller"
92 depends on OF || COMPILE_TEST
93 select GENERIC_IRQ_CHIP
96 Support Amazon's Annapurna Labs Fabric Interrupt Controller.
100 select GENERIC_IRQ_CHIP
102 select GENERIC_IRQ_MULTI_HANDLER
105 config ATMEL_AIC5_IRQ
107 select GENERIC_IRQ_CHIP
109 select GENERIC_IRQ_MULTI_HANDLER
116 config BCM6345_L1_IRQ
118 select GENERIC_IRQ_CHIP
120 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
122 config BCM7038_L1_IRQ
124 select GENERIC_IRQ_CHIP
126 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
128 config BCM7120_L2_IRQ
130 select GENERIC_IRQ_CHIP
133 config BRCMSTB_L2_IRQ
135 select GENERIC_IRQ_CHIP
140 select GENERIC_IRQ_CHIP
143 config DAVINCI_CP_INTC
145 select GENERIC_IRQ_CHIP
150 select GENERIC_IRQ_CHIP
151 select IRQ_DOMAIN_HIERARCHY
153 config FARADAY_FTINTC010
156 select GENERIC_IRQ_MULTI_HANDLER
159 config HISILICON_IRQ_MBIGEN
162 select ARM_GIC_V3_ITS
166 select GENERIC_IRQ_CHIP
172 select GENERIC_IRQ_MULTI_HANDLER
180 select GENERIC_IRQ_CHIP
181 select GENERIC_IRQ_IPI if SMP && SYS_SUPPORTS_MULTITHREADING
183 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
185 config CLPS711X_IRQCHIP
187 depends on ARCH_CLPS711X
189 select GENERIC_IRQ_MULTI_HANDLER
202 select GENERIC_IRQ_CHIP
208 select GENERIC_IRQ_MULTI_HANDLER
212 select GENERIC_IRQ_CHIP
216 bool "J-Core integrated AIC" if COMPILE_TEST
220 Support for the J-Core integrated AIC.
226 config RENESAS_INTC_IRQPIN
227 bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST
230 Enable support for the Renesas Interrupt Controller for external
231 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
234 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
235 select GENERIC_IRQ_CHIP
238 Enable support for the Renesas Interrupt Controller for external
239 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
241 config RENESAS_RZA1_IRQC
242 bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST
243 select IRQ_DOMAIN_HIERARCHY
245 Enable support for the Renesas RZ/A1 Interrupt Controller, to use up
246 to 8 external interrupts with configurable sense select.
249 bool "Kontron sl28cpld IRQ controller"
250 depends on MFD_SL28CPLD=y || COMPILE_TEST
253 Interrupt controller driver for the board management controller
254 found on the Kontron sl28 CPLD.
261 Enables SysCfg Controlled IRQs on STi based platforms.
266 select GENERIC_IRQ_CHIP
271 select GENERIC_IRQ_CHIP
274 tristate "TS-4800 IRQ controller"
277 depends on SOC_IMX51 || COMPILE_TEST
279 Support for the TS-4800 FPGA IRQ controller
281 config VERSATILE_FPGA_IRQ
285 config VERSATILE_FPGA_IRQ_NR
288 depends on VERSATILE_FPGA_IRQ
293 select GENERIC_IRQ_EFFECTIVE_AFF_MASK
302 Support for a CROSSBAR ip that precedes the main interrupt controller.
303 The primary irqchip invokes the crossbar's callback which inturn allocates
304 a free irq and configures the IP. Thus the peripheral interrupts are
305 routed to one of the free irqchip interrupt lines.
308 tristate "Keystone 2 IRQ controller IP"
309 depends on ARCH_KEYSTONE
311 Support for Texas Instruments Keystone 2 IRQ controller IP which
312 is part of the Keystone 2 IPC mechanism
316 select GENERIC_IRQ_IPI if SMP
317 select IRQ_DOMAIN_HIERARCHY
322 depends on MACH_INGENIC
325 config INGENIC_TCU_IRQ
326 bool "Ingenic JZ47xx TCU interrupt controller"
328 depends on MIPS || COMPILE_TEST
330 select GENERIC_IRQ_CHIP
332 Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic
337 config RENESAS_H8300H_INTC
341 config RENESAS_H8S_INTC
342 bool "Renesas H8S Interrupt Controller Support" if COMPILE_TEST
345 Enable support for the Renesas H8/300 Interrupt Controller, as found
352 Enables the wakeup IRQs for IMX platforms with GPCv2 block
355 def_bool y if MACH_ASM9260 || ARCH_MXS
359 config MSCC_OCELOT_IRQ
362 select GENERIC_IRQ_CHIP
372 select GENERIC_MSI_IRQ_DOMAIN
381 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
385 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
386 depends on PCI && PCI_MSI
388 config PARTITION_PERCPU
392 bool "NPS400 Global Interrupt Manager (GIM)"
393 depends on ARC || (COMPILE_TEST && !64BIT)
396 Support the EZchip NPS400 global interrupt controller
401 select GENERIC_IRQ_CHIP
403 config QCOM_IRQ_COMBINER
404 bool "QCOM IRQ combiner support"
405 depends on ARCH_QCOM && ACPI
406 select IRQ_DOMAIN_HIERARCHY
408 Say yes here to add support for the IRQ combiner devices embedded
409 in Qualcomm Technologies chips.
411 config IRQ_UNIPHIER_AIDET
412 bool "UniPhier AIDET support" if COMPILE_TEST
413 depends on ARCH_UNIPHIER || COMPILE_TEST
414 default ARCH_UNIPHIER
415 select IRQ_DOMAIN_HIERARCHY
417 Support for the UniPhier AIDET (ARM Interrupt Detector).
419 config MESON_IRQ_GPIO
420 bool "Meson GPIO Interrupt Multiplexer"
421 depends on ARCH_MESON
422 select IRQ_DOMAIN_HIERARCHY
424 Support Meson SoC Family GPIO Interrupt Multiplexer
427 bool "Goldfish programmable interrupt controller"
428 depends on MIPS && (GOLDFISH || COMPILE_TEST)
429 select GENERIC_IRQ_CHIP
432 Say yes here to enable Goldfish interrupt controller driver used
433 for Goldfish based virtual platforms.
438 select IRQ_DOMAIN_HIERARCHY
440 Power Domain Controller driver to manage and configure wakeup
441 IRQs for Qualcomm Technologies Inc (QTI) mobile chips.
444 bool "C-SKY Multi Processor Interrupt Controller"
447 Say yes here to enable C-SKY SMP interrupt controller driver used
448 for C-SKY SMP system.
449 In fact it's not mmio map in hardware and it uses ld/st to visit the
450 controller's register inside CPU.
453 bool "C-SKY APB Interrupt Controller"
456 Say yes here to enable C-SKY APB interrupt controller driver used
457 by C-SKY single core SOC system. It uses mmio map apb-bus to visit
458 the controller's register.
461 bool "i.MX IRQSTEER support"
462 depends on ARCH_MXC || COMPILE_TEST
466 Support for the i.MX IRQSTEER interrupt multiplexer/remapper.
469 bool "i.MX INTMUX support" if COMPILE_TEST
470 default y if ARCH_MXC
473 Support for the i.MX INTMUX interrupt multiplexer.
476 bool "Loongson-1 Interrupt Controller"
477 depends on MACH_LOONGSON32
480 select GENERIC_IRQ_CHIP
482 Support for the Loongson-1 platform Interrupt Controller.
484 config TI_SCI_INTR_IRQCHIP
486 depends on TI_SCI_PROTOCOL
487 select IRQ_DOMAIN_HIERARCHY
489 This enables the irqchip driver support for K3 Interrupt router
490 over TI System Control Interface available on some new TI's SoCs.
491 If you wish to use interrupt router irq resources managed by the
492 TI System Controller, say Y here. Otherwise, say N.
494 config TI_SCI_INTA_IRQCHIP
496 depends on TI_SCI_PROTOCOL
497 select IRQ_DOMAIN_HIERARCHY
498 select TI_SCI_INTA_MSI_DOMAIN
500 This enables the irqchip driver support for K3 Interrupt aggregator
501 over TI System Control Interface available on some new TI's SoCs.
502 If you wish to use interrupt aggregator irq resources managed by the
503 TI System Controller, say Y here. Otherwise, say N.
506 tristate "TI PRU-ICSS Interrupt Controller"
507 depends on ARCH_DAVINCI || SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE || ARCH_K3
510 This enables support for the PRU-ICSS Local Interrupt Controller
511 present within a PRU-ICSS subsystem present on various TI SoCs.
512 The PRUSS INTC enables various interrupts to be routed to multiple
513 different processors within the SoC.
516 bool "RISC-V Local Interrupt Controller"
520 This enables support for the per-HART local interrupt controller
521 found in standard RISC-V systems. The per-HART local interrupt
522 controller handles timer interrupts, software interrupts, and
523 hardware interrupts. Without a per-HART local interrupt controller,
524 a RISC-V system will be unable to handle any interrupts.
526 If you don't know what to do here, say Y.
529 bool "SiFive Platform-Level Interrupt Controller"
531 select IRQ_DOMAIN_HIERARCHY
533 This enables support for the PLIC chip found in SiFive (and
534 potentially other) RISC-V systems. The PLIC controls devices
535 interrupts and connects them to each core's local interrupt
536 controller. Aside from timer and software interrupts, all other
537 interrupt sources are subordinate to the PLIC.
539 If you don't know what to do here, say Y.
541 config EXYNOS_IRQ_COMBINER
542 bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST
543 depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST
545 Say yes here to add support for the IRQ combiner devices embedded
546 in Samsung Exynos chips.
548 config LOONGSON_LIOINTC
549 bool "Loongson Local I/O Interrupt Controller"
550 depends on MACH_LOONGSON64
553 select GENERIC_IRQ_CHIP
555 Support for the Loongson Local I/O Interrupt Controller.
557 config LOONGSON_HTPIC
558 bool "Loongson3 HyperTransport PIC Controller"
559 depends on MACH_LOONGSON64
562 select GENERIC_IRQ_CHIP
564 Support for the Loongson-3 HyperTransport PIC Controller.
566 config LOONGSON_HTVEC
567 bool "Loongson3 HyperTransport Interrupt Vector Controller"
568 depends on MACH_LOONGSON64
569 default MACH_LOONGSON64
570 select IRQ_DOMAIN_HIERARCHY
572 Support for the Loongson3 HyperTransport Interrupt Vector Controller.
574 config LOONGSON_PCH_PIC
575 bool "Loongson PCH PIC Controller"
576 depends on MACH_LOONGSON64 || COMPILE_TEST
577 default MACH_LOONGSON64
578 select IRQ_DOMAIN_HIERARCHY
579 select IRQ_FASTEOI_HIERARCHY_HANDLERS
581 Support for the Loongson PCH PIC Controller.
583 config LOONGSON_PCH_MSI
584 bool "Loongson PCH MSI Controller"
585 depends on MACH_LOONGSON64 || COMPILE_TEST
587 default MACH_LOONGSON64
588 select IRQ_DOMAIN_HIERARCHY
591 Support for the Loongson PCH MSI Controller.
594 bool "MStar Interrupt Controller"
595 depends on ARCH_MEDIATEK || ARCH_MSTARV7 || COMPILE_TEST
596 default ARCH_MEDIATEK
598 select IRQ_DOMAIN_HIERARCHY
600 Support MStar Interrupt Controller.