2 The x86 kernel supports tracing most MSR (Model Specific Register) accesses.
3 To see the definition of the MSRs on Intel systems please see the SDM
4 at http://www.intel.com/sdm (Volume 3)
6 Available trace points:
8 /sys/kernel/debug/tracing/events/msr/
16 failed: 1 if the access failed, otherwise 0
25 failed: 1 if the access failed, otherwise 0
32 The trace data can be post processed with the postprocess/decode_msr.py script
34 cat /sys/kernel/debug/tracing/trace | decode_msr.py /usr/src/linux/include/asm/msr-index.h
36 to add symbolic MSR names.