5 This document describes the Linux kernel Makefiles.
11 === 3 The kbuild files
12 --- 3.1 Goal definitions
13 --- 3.2 Built-in object goals - obj-y
14 --- 3.3 Loadable module goals - obj-m
15 --- 3.4 Objects which export symbols
16 --- 3.5 Library file goals - lib-y
17 --- 3.6 Descending down in directories
18 --- 3.7 Compilation flags
20 --- 3.9 Dependency tracking
21 --- 3.10 Special Rules
22 --- 3.11 $(CC) support functions
23 --- 3.12 $(LD) support functions
24 --- 3.13 Script Invocation
26 === 4 Host Program support
27 --- 4.1 Simple Host Program
28 --- 4.2 Composite Host Programs
29 --- 4.3 Using C++ for host programs
30 --- 4.4 Controlling compiler options for host programs
31 --- 4.5 When host programs are actually built
33 === 5 Userspace Program support
34 --- 5.1 Simple Userspace Program
35 --- 5.2 Composite Userspace Programs
36 --- 5.3 Controlling compiler options for userspace programs
37 --- 5.4 When userspace programs are actually built
39 === 6 Kbuild clean infrastructure
41 === 7 Architecture Makefiles
42 --- 7.1 Set variables to tweak the build to the architecture
43 --- 7.2 Add prerequisites to archheaders
44 --- 7.3 Add prerequisites to archprepare
45 --- 7.4 List directories to visit when descending
46 --- 7.5 Architecture-specific boot images
47 --- 7.6 Building non-kbuild targets
48 --- 7.7 Commands useful for building a boot image
49 --- 7.8 Custom kbuild commands
50 --- 7.9 Preprocessing linker scripts
51 --- 7.10 Generic header files
52 --- 7.11 Post-link pass
54 === 8 Kbuild syntax for exported headers
55 --- 8.1 no-export-headers
60 === 9 Kbuild Variables
61 === 10 Makefile language
68 The Makefiles have five parts::
70 Makefile the top Makefile.
71 .config the kernel configuration file.
72 arch/$(ARCH)/Makefile the arch Makefile.
73 scripts/Makefile.* common rules etc. for all kbuild Makefiles.
74 kbuild Makefiles there are about 500 of these.
76 The top Makefile reads the .config file, which comes from the kernel
77 configuration process.
79 The top Makefile is responsible for building two major products: vmlinux
80 (the resident kernel image) and modules (any module files).
81 It builds these goals by recursively descending into the subdirectories of
82 the kernel source tree.
83 The list of subdirectories which are visited depends upon the kernel
84 configuration. The top Makefile textually includes an arch Makefile
85 with the name arch/$(ARCH)/Makefile. The arch Makefile supplies
86 architecture-specific information to the top Makefile.
88 Each subdirectory has a kbuild Makefile which carries out the commands
89 passed down from above. The kbuild Makefile uses information from the
90 .config file to construct various file lists used by kbuild to build
91 any built-in or modular targets.
93 scripts/Makefile.* contains all the definitions/rules etc. that
94 are used to build the kernel based on the kbuild makefiles.
100 People have four different relationships with the kernel Makefiles.
102 *Users* are people who build kernels. These people type commands such as
103 "make menuconfig" or "make". They usually do not read or edit
104 any kernel Makefiles (or any other source files).
106 *Normal developers* are people who work on features such as device
107 drivers, file systems, and network protocols. These people need to
108 maintain the kbuild Makefiles for the subsystem they are
109 working on. In order to do this effectively, they need some overall
110 knowledge about the kernel Makefiles, plus detailed knowledge about the
111 public interface for kbuild.
113 *Arch developers* are people who work on an entire architecture, such
114 as sparc or ia64. Arch developers need to know about the arch Makefile
115 as well as kbuild Makefiles.
117 *Kbuild developers* are people who work on the kernel build system itself.
118 These people need to know about all aspects of the kernel Makefiles.
120 This document is aimed towards normal developers and arch developers.
126 Most Makefiles within the kernel are kbuild Makefiles that use the
127 kbuild infrastructure. This chapter introduces the syntax used in the
129 The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can
130 be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild'
133 Section 3.1 "Goal definitions" is a quick intro; further chapters provide
134 more details, with real examples.
139 Goal definitions are the main part (heart) of the kbuild Makefile.
140 These lines define the files to be built, any special compilation
141 options, and any subdirectories to be entered recursively.
143 The most simple kbuild makefile contains one line:
149 This tells kbuild that there is one object in that directory, named
150 foo.o. foo.o will be built from foo.c or foo.S.
152 If foo.o shall be built as a module, the variable obj-m is used.
153 Therefore the following pattern is often used:
157 obj-$(CONFIG_FOO) += foo.o
159 $(CONFIG_FOO) evaluates to either y (for built-in) or m (for module).
160 If CONFIG_FOO is neither y nor m, then the file will not be compiled
163 3.2 Built-in object goals - obj-y
164 ---------------------------------
166 The kbuild Makefile specifies object files for vmlinux
167 in the $(obj-y) lists. These lists depend on the kernel
170 Kbuild compiles all the $(obj-y) files. It then calls
171 "$(AR) rcSTP" to merge these files into one built-in.a file.
172 This is a thin archive without a symbol table. It will be later
173 linked into vmlinux by scripts/link-vmlinux.sh
175 The order of files in $(obj-y) is significant. Duplicates in
176 the lists are allowed: the first instance will be linked into
177 built-in.a and succeeding instances will be ignored.
179 Link order is significant, because certain functions
180 (module_init() / __initcall) will be called during boot in the
181 order they appear. So keep in mind that changing the link
182 order may e.g. change the order in which your SCSI
183 controllers are detected, and thus your disks are renumbered.
187 #drivers/isdn/i4l/Makefile
188 # Makefile for the kernel ISDN subsystem and device drivers.
189 # Each configuration option enables a list of files.
190 obj-$(CONFIG_ISDN_I4L) += isdn.o
191 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
193 3.3 Loadable module goals - obj-m
194 ---------------------------------
196 $(obj-m) specifies object files which are built as loadable
199 A module may be built from one source file or several source
200 files. In the case of one source file, the kbuild makefile
201 simply adds the file to $(obj-m).
205 #drivers/isdn/i4l/Makefile
206 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
208 Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm'
210 If a kernel module is built from several source files, you specify
211 that you want to build a module in the same way as above; however,
212 kbuild needs to know which object files you want to build your
213 module from, so you have to tell it by setting a $(<module_name>-y)
218 #drivers/isdn/i4l/Makefile
219 obj-$(CONFIG_ISDN_I4L) += isdn.o
220 isdn-y := isdn_net_lib.o isdn_v110.o isdn_common.o
222 In this example, the module name will be isdn.o. Kbuild will
223 compile the objects listed in $(isdn-y) and then run
224 "$(LD) -r" on the list of these files to generate isdn.o.
226 Due to kbuild recognizing $(<module_name>-y) for composite objects,
227 you can use the value of a `CONFIG_` symbol to optionally include an
228 object file as part of a composite object.
233 obj-$(CONFIG_EXT2_FS) += ext2.o
234 ext2-y := balloc.o dir.o file.o ialloc.o inode.o ioctl.o \
235 namei.o super.o symlink.o
236 ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o xattr_user.o \
239 In this example, xattr.o, xattr_user.o and xattr_trusted.o are only
240 part of the composite object ext2.o if $(CONFIG_EXT2_FS_XATTR)
243 Note: Of course, when you are building objects into the kernel,
244 the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,
245 kbuild will build an ext2.o file for you out of the individual
246 parts and then link this into built-in.a, as you would expect.
248 3.4 Objects which export symbols
249 --------------------------------
251 No special notation is required in the makefiles for
252 modules exporting symbols.
254 3.5 Library file goals - lib-y
255 ------------------------------
257 Objects listed with obj-* are used for modules, or
258 combined in a built-in.a for that specific directory.
259 There is also the possibility to list objects that will
260 be included in a library, lib.a.
261 All objects listed with lib-y are combined in a single
262 library for that directory.
263 Objects that are listed in obj-y and additionally listed in
264 lib-y will not be included in the library, since they will
265 be accessible anyway.
266 For consistency, objects listed in lib-m will be included in lib.a.
268 Note that the same kbuild makefile may list files to be built-in
269 and to be part of a library. Therefore the same directory
270 may contain both a built-in.a and a lib.a file.
274 #arch/x86/lib/Makefile
277 This will create a library lib.a based on delay.o. For kbuild to
278 actually recognize that there is a lib.a being built, the directory
279 shall be listed in libs-y.
281 See also "6.4 List directories to visit when descending".
283 Use of lib-y is normally restricted to `lib/` and `arch/*/lib`.
285 3.6 Descending down in directories
286 ----------------------------------
288 A Makefile is only responsible for building objects in its own
289 directory. Files in subdirectories should be taken care of by
290 Makefiles in these subdirs. The build system will automatically
291 invoke make recursively in subdirectories, provided you let it know of
294 To do so, obj-y and obj-m are used.
295 ext2 lives in a separate directory, and the Makefile present in fs/
296 tells kbuild to descend down using the following assignment.
301 obj-$(CONFIG_EXT2_FS) += ext2/
303 If CONFIG_EXT2_FS is set to either 'y' (built-in) or 'm' (modular)
304 the corresponding obj- variable will be set, and kbuild will descend
305 down in the ext2 directory.
307 Kbuild uses this information not only to decide that it needs to visit
308 the directory, but also to decide whether or not to link objects from
309 the directory into vmlinux.
311 When Kbuild descends into the directory with 'y', all built-in objects
312 from that directory are combined into the built-in.a, which will be
313 eventually linked into vmlinux.
315 When Kbuild descends into the directory with 'm', in contrast, nothing
316 from that directory will be linked into vmlinux. If the Makefile in
317 that directory specifies obj-y, those objects will be left orphan.
318 It is very likely a bug of the Makefile or of dependencies in Kconfig.
320 It is good practice to use a `CONFIG_` variable when assigning directory
321 names. This allows kbuild to totally skip the directory if the
322 corresponding `CONFIG_` option is neither 'y' nor 'm'.
324 3.7 Compilation flags
325 ---------------------
327 ccflags-y, asflags-y and ldflags-y
328 These three flags apply only to the kbuild makefile in which they
329 are assigned. They are used for all the normal cc, as and ld
330 invocations happening during a recursive build.
331 Note: Flags with the same behaviour were previously named:
332 EXTRA_CFLAGS, EXTRA_AFLAGS and EXTRA_LDFLAGS.
333 They are still supported but their usage is deprecated.
335 ccflags-y specifies options for compiling with $(CC).
339 # drivers/acpi/acpica/Makefile
340 ccflags-y := -Os -D_LINUX -DBUILDING_ACPICA
341 ccflags-$(CONFIG_ACPI_DEBUG) += -DACPI_DEBUG_OUTPUT
343 This variable is necessary because the top Makefile owns the
344 variable $(KBUILD_CFLAGS) and uses it for compilation flags for the
347 asflags-y specifies assembler options.
351 #arch/sparc/kernel/Makefile
354 ldflags-y specifies options for linking with $(LD).
358 #arch/cris/boot/compressed/Makefile
359 ldflags-y += -T $(srctree)/$(src)/decompress_$(arch-y).lds
361 subdir-ccflags-y, subdir-asflags-y
362 The two flags listed above are similar to ccflags-y and asflags-y.
363 The difference is that the subdir- variants have effect for the kbuild
364 file where they are present and all subdirectories.
365 Options specified using subdir-* are added to the commandline before
366 the options specified using the non-subdir variants.
370 subdir-ccflags-y := -Werror
372 ccflags-remove-y, asflags-remove-y
373 These flags are used to remove particular flags for the compiler,
374 assembler invocations.
378 ccflags-remove-$(CONFIG_MCOUNT) += -pg
381 CFLAGS_$@ and AFLAGS_$@ only apply to commands in current
384 $(CFLAGS_$@) specifies per-file options for $(CC). The $@
385 part has a literal value which specifies the file that it is for.
387 CFLAGS_$@ has the higher priority than ccflags-remove-y; CFLAGS_$@
388 can re-add compiler flags that were removed by ccflags-remove-y.
392 # drivers/scsi/Makefile
393 CFLAGS_aha152x.o = -DAHA152X_STAT -DAUTOCONF
394 CFLAGS_gdth.o = # -DDEBUG_GDTH=2 -D__SERIAL__ -D__COM2__ \
397 These two lines specify compilation flags for aha152x.o and gdth.o.
399 $(AFLAGS_$@) is a similar feature for source files in assembly
402 AFLAGS_$@ has the higher priority than asflags-remove-y; AFLAGS_$@
403 can re-add assembler flags that were removed by asflags-remove-y.
407 # arch/arm/kernel/Makefile
408 AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET)
409 AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
410 AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
413 3.9 Dependency tracking
414 -----------------------
416 Kbuild tracks dependencies on the following:
418 1) All prerequisite files (both `*.c` and `*.h`)
419 2) `CONFIG_` options used in all prerequisite files
420 3) Command-line used to compile target
422 Thus, if you change an option to $(CC) all affected files will
428 Special rules are used when the kbuild infrastructure does
429 not provide the required support. A typical example is
430 header files generated during the build process.
431 Another example are the architecture-specific Makefiles which
432 need special rules to prepare boot images etc.
434 Special rules are written as normal Make rules.
435 Kbuild is not executing in the directory where the Makefile is
436 located, so all special rules shall provide a relative
437 path to prerequisite files and target files.
439 Two variables are used when defining special rules:
442 $(src) is a relative path which points to the directory
443 where the Makefile is located. Always use $(src) when
444 referring to files located in the src tree.
447 $(obj) is a relative path which points to the directory
448 where the target is saved. Always use $(obj) when
449 referring to generated files.
453 #drivers/scsi/Makefile
454 $(obj)/53c8xx_d.h: $(src)/53c7,8xx.scr $(src)/script_asm.pl
455 $(CPP) -DCHIP=810 - < $< | ... $(src)/script_asm.pl
457 This is a special rule, following the normal syntax
460 The target file depends on two prerequisite files. References
461 to the target file are prefixed with $(obj), references
462 to prerequisites are referenced with $(src) (because they are not
466 echoing information to user in a rule is often a good practice
467 but when execution "make -s" one does not expect to see any output
468 except for warnings/errors.
469 To support this kbuild defines $(kecho) which will echo out the
470 text following $(kecho) to stdout except if "make -s" is used.
474 #arch/blackfin/boot/Makefile
475 $(obj)/vmImage: $(obj)/vmlinux.gz
476 $(call if_changed,uimage)
477 @$(kecho) 'Kernel: $@ is ready'
480 3.11 $(CC) support functions
481 ----------------------------
483 The kernel may be built with several different versions of
484 $(CC), each supporting a unique set of features and options.
485 kbuild provides basic support to check for valid options for $(CC).
486 $(CC) is usually the gcc compiler, but other alternatives are
490 as-option is used to check if $(CC) -- when used to compile
491 assembler (`*.S`) files -- supports the given option. An optional
492 second option may be specified if the first option is not supported.
497 cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)
499 In the above example, cflags-y will be assigned the option
500 -Wa$(comma)-isa=$(isa-y) if it is supported by $(CC).
501 The second argument is optional, and if supplied will be used
502 if first argument is not supported.
505 as-instr checks if the assembler reports a specific instruction
506 and then outputs either option1 or option2
507 C escapes are supported in the test instruction
508 Note: as-instr-option uses KBUILD_AFLAGS for assembler options
511 cc-option is used to check if $(CC) supports a given option, and if
512 not supported to use an optional second option.
517 cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586)
519 In the above example, cflags-y will be assigned the option
520 -march=pentium-mmx if supported by $(CC), otherwise -march=i586.
521 The second argument to cc-option is optional, and if omitted,
522 cflags-y will be assigned no value if first option is not supported.
523 Note: cc-option uses KBUILD_CFLAGS for $(CC) options
526 cc-option-yn is used to check if gcc supports a given option
527 and return 'y' if supported, otherwise 'n'.
532 biarch := $(call cc-option-yn, -m32)
533 aflags-$(biarch) += -a32
534 cflags-$(biarch) += -m32
536 In the above example, $(biarch) is set to y if $(CC) supports the -m32
537 option. When $(biarch) equals 'y', the expanded variables $(aflags-y)
538 and $(cflags-y) will be assigned the values -a32 and -m32,
540 Note: cc-option-yn uses KBUILD_CFLAGS for $(CC) options
543 cc-disable-warning checks if gcc supports a given warning and returns
544 the commandline switch to disable it. This special function is needed,
545 because gcc 4.4 and later accept any unknown -Wno-* option and only
546 warn about it if there is another warning in the source file.
550 KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable)
552 In the above example, -Wno-unused-but-set-variable will be added to
553 KBUILD_CFLAGS only if gcc really accepts it.
556 cc-ifversion tests the version of $(CC) and equals the fourth parameter
557 if version expression is true, or the fifth (if given) if the version
562 #fs/reiserfs/Makefile
563 ccflags-y := $(call cc-ifversion, -lt, 0402, -O1)
565 In this example, ccflags-y will be assigned the value -O1 if the
566 $(CC) version is less than 4.2.
567 cc-ifversion takes all the shell operators:
568 -eq, -ne, -lt, -le, -gt, and -ge
569 The third parameter may be a text as in this example, but it may also
570 be an expanded variable or a macro.
573 cc-cross-prefix is used to check if there exists a $(CC) in path with
574 one of the listed prefixes. The first prefix where there exist a
575 prefix$(CC) in the PATH is returned - and if no prefix$(CC) is found
576 then nothing is returned.
577 Additional prefixes are separated by a single space in the
578 call of cc-cross-prefix.
579 This functionality is useful for architecture Makefiles that try
580 to set CROSS_COMPILE to well-known values but may have several
581 values to select between.
582 It is recommended only to try to set CROSS_COMPILE if it is a cross
583 build (host arch is different from target arch). And if CROSS_COMPILE
584 is already set then leave it with the old value.
589 ifneq ($(SUBARCH),$(ARCH))
590 ifeq ($(CROSS_COMPILE),)
591 CROSS_COMPILE := $(call cc-cross-prefix, m68k-linux-gnu-)
595 3.12 $(LD) support functions
596 ----------------------------
599 ld-option is used to check if $(LD) supports the supplied option.
600 ld-option takes two options as arguments.
601 The second argument is an optional option that can be used if the
602 first option is not supported by $(LD).
607 LDFLAGS_vmlinux += $(call ld-option, -X)
609 3.13 Script invocation
610 ----------------------
612 Make rules may invoke scripts to build the kernel. The rules shall
613 always provide the appropriate interpreter to execute the script. They
614 shall not rely on the execute bits being set, and shall not invoke the
615 script directly. For the convenience of manual script invocation, such
616 as invoking ./scripts/checkpatch.pl, it is recommended to set execute
617 bits on the scripts nonetheless.
619 Kbuild provides variables $(CONFIG_SHELL), $(AWK), $(PERL),
620 $(PYTHON) and $(PYTHON3) to refer to interpreters for the respective
626 cmd_depmod = $(CONFIG_SHELL) $(srctree)/scripts/depmod.sh $(DEPMOD) \
629 4 Host Program support
630 ======================
632 Kbuild supports building executables on the host for use during the
634 Two steps are required in order to use a host executable.
636 The first step is to tell kbuild that a host program exists. This is
637 done utilising the variable "hostprogs".
639 The second step is to add an explicit dependency to the executable.
640 This can be done in two ways. Either add the dependency in a rule,
641 or utilise the variable "always-y".
642 Both possibilities are described in the following.
644 4.1 Simple Host Program
645 -----------------------
647 In some cases there is a need to compile and run a program on the
648 computer where the build is running.
649 The following line tells kbuild that the program bin2hex shall be
650 built on the build host.
656 Kbuild assumes in the above example that bin2hex is made from a single
657 c-source file named bin2hex.c located in the same directory as
660 4.2 Composite Host Programs
661 ---------------------------
663 Host programs can be made up based on composite objects.
664 The syntax used to define composite objects for host programs is
665 similar to the syntax used for kernel objects.
666 $(<executable>-objs) lists all objects used to link the final
671 #scripts/lxdialog/Makefile
672 hostprogs := lxdialog
673 lxdialog-objs := checklist.o lxdialog.o
675 Objects with extension .o are compiled from the corresponding .c
676 files. In the above example, checklist.c is compiled to checklist.o
677 and lxdialog.c is compiled to lxdialog.o.
679 Finally, the two .o files are linked to the executable, lxdialog.
680 Note: The syntax <executable>-y is not permitted for host-programs.
682 4.3 Using C++ for host programs
683 -------------------------------
685 kbuild offers support for host programs written in C++. This was
686 introduced solely to support kconfig, and is not recommended
691 #scripts/kconfig/Makefile
693 qconf-cxxobjs := qconf.o
695 In the example above the executable is composed of the C++ file
696 qconf.cc - identified by $(qconf-cxxobjs).
698 If qconf is composed of a mixture of .c and .cc files, then an
699 additional line can be used to identify this.
703 #scripts/kconfig/Makefile
705 qconf-cxxobjs := qconf.o
706 qconf-objs := check.o
708 4.4 Controlling compiler options for host programs
709 --------------------------------------------------
711 When compiling host programs, it is possible to set specific flags.
712 The programs will always be compiled utilising $(HOSTCC) passed
713 the options specified in $(KBUILD_HOSTCFLAGS).
714 To set flags that will take effect for all host programs created
715 in that Makefile, use the variable HOST_EXTRACFLAGS.
719 #scripts/lxdialog/Makefile
720 HOST_EXTRACFLAGS += -I/usr/include/ncurses
722 To set specific flags for a single file the following construction
727 #arch/ppc64/boot/Makefile
728 HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE)
730 It is also possible to specify additional options to the linker.
734 #scripts/kconfig/Makefile
735 HOSTLDLIBS_qconf := -L$(QTDIR)/lib
737 When linking qconf, it will be passed the extra option
740 4.5 When host programs are actually built
741 -----------------------------------------
743 Kbuild will only build host-programs when they are referenced
745 This is possible in two ways:
747 (1) List the prerequisite explicitly in a special rule.
751 #drivers/pci/Makefile
752 hostprogs := gen-devlist
753 $(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist
754 ( cd $(obj); ./gen-devlist ) < $<
756 The target $(obj)/devlist.h will not be built before
757 $(obj)/gen-devlist is updated. Note that references to
758 the host programs in special rules must be prefixed with $(obj).
762 When there is no suitable special rule, and the host program
763 shall be built when a makefile is entered, the always-y
764 variable shall be used.
768 #scripts/lxdialog/Makefile
769 hostprogs := lxdialog
770 always-y := $(hostprogs)
772 Kbuild provides the following shorthand for this:
774 hostprogs-always-y := lxdialog
776 This will tell kbuild to build lxdialog even if not referenced in
779 5 Userspace Program support
780 ===========================
782 Just like host programs, Kbuild also supports building userspace executables
783 for the target architecture (i.e. the same architecture as you are building
786 The syntax is quite similar. The difference is to use "userprogs" instead of
789 5.1 Simple Userspace Program
790 ----------------------------
792 The following line tells kbuild that the program bpf-direct shall be
793 built for the target architecture.
797 userprogs := bpf-direct
799 Kbuild assumes in the above example that bpf-direct is made from a
800 single C source file named bpf-direct.c located in the same directory
803 5.2 Composite Userspace Programs
804 --------------------------------
806 Userspace programs can be made up based on composite objects.
807 The syntax used to define composite objects for userspace programs is
808 similar to the syntax used for kernel objects.
809 $(<executable>-objs) lists all objects used to link the final
814 #samples/seccomp/Makefile
815 userprogs := bpf-fancy
816 bpf-fancy-objs := bpf-fancy.o bpf-helper.o
818 Objects with extension .o are compiled from the corresponding .c
819 files. In the above example, bpf-fancy.c is compiled to bpf-fancy.o
820 and bpf-helper.c is compiled to bpf-helper.o.
822 Finally, the two .o files are linked to the executable, bpf-fancy.
823 Note: The syntax <executable>-y is not permitted for userspace programs.
825 5.3 Controlling compiler options for userspace programs
826 -------------------------------------------------------
828 When compiling userspace programs, it is possible to set specific flags.
829 The programs will always be compiled utilising $(CC) passed
830 the options specified in $(KBUILD_USERCFLAGS).
831 To set flags that will take effect for all userspace programs created
832 in that Makefile, use the variable userccflags.
836 # samples/seccomp/Makefile
837 userccflags += -I usr/include
839 To set specific flags for a single file the following construction
844 bpf-helper-userccflags += -I user/include
846 It is also possible to specify additional options to the linker.
850 # net/bpfilter/Makefile
851 bpfilter_umh-userldflags += -static
853 When linking bpfilter_umh, it will be passed the extra option -static.
855 5.4 When userspace programs are actually built
856 ----------------------------------------------
858 Kbuild builds userspace programs only when told to do so.
859 There are two ways to do this.
861 (1) Add it as the prerequisite of another file
865 #net/bpfilter/Makefile
866 userprogs := bpfilter_umh
867 $(obj)/bpfilter_umh_blob.o: $(obj)/bpfilter_umh
869 $(obj)/bpfilter_umh is built before $(obj)/bpfilter_umh_blob.o
875 userprogs := binderfs_example
876 always-y := $(userprogs)
878 Kbuild provides the following shorthand for this:
880 userprogs-always-y := binderfs_example
882 This will tell Kbuild to build binderfs_example when it visits this
885 6 Kbuild clean infrastructure
886 =============================
888 "make clean" deletes most generated files in the obj tree where the kernel
889 is compiled. This includes generated files such as host programs.
890 Kbuild knows targets listed in $(hostprogs), $(always-y), $(always-m),
891 $(always-), $(extra-y), $(extra-) and $(targets). They are all deleted
892 during "make clean". Files matching the patterns "*.[oas]", "*.ko", plus
893 some additional files generated by kbuild are deleted all over the kernel
894 source tree when "make clean" is executed.
896 Additional files or directories can be specified in kbuild makefiles by use of
902 clean-files := crc32table.h
904 When executing "make clean", the file "crc32table.h" will be deleted.
905 Kbuild will assume files to be in the same relative directory as the
906 Makefile, except if prefixed with $(objtree).
908 To exclude certain files or directories from make clean, use the
909 $(no-clean-files) variable.
911 Usually kbuild descends down in subdirectories due to "obj-* := dir/",
912 but in the architecture makefiles where the kbuild infrastructure
913 is not sufficient this sometimes needs to be explicit.
917 #arch/x86/boot/Makefile
918 subdir- := compressed
920 The above assignment instructs kbuild to descend down in the
921 directory compressed/ when "make clean" is executed.
923 To support the clean infrastructure in the Makefiles that build the
924 final bootimage there is an optional target named archclean:
930 $(Q)$(MAKE) $(clean)=arch/x86/boot
932 When "make clean" is executed, make will descend down in arch/x86/boot,
933 and clean as usual. The Makefile located in arch/x86/boot/ may use
934 the subdir- trick to descend further down.
936 Note 1: arch/$(ARCH)/Makefile cannot use "subdir-", because that file is
937 included in the top level makefile, and the kbuild infrastructure
938 is not operational at that point.
940 Note 2: All directories listed in core-y, libs-y, drivers-y and net-y will
941 be visited during "make clean".
943 7 Architecture Makefiles
944 ========================
946 The top level Makefile sets up the environment and does the preparation,
947 before starting to descend down in the individual directories.
948 The top level makefile contains the generic part, whereas
949 arch/$(ARCH)/Makefile contains what is required to set up kbuild
950 for said architecture.
951 To do so, arch/$(ARCH)/Makefile sets up a number of variables and defines
954 When kbuild executes, the following steps are followed (roughly):
956 1) Configuration of the kernel => produce .config
957 2) Store kernel version in include/linux/version.h
958 3) Updating all other prerequisites to the target prepare:
959 - Additional prerequisites are specified in arch/$(ARCH)/Makefile
960 4) Recursively descend down in all directories listed in
961 init-* core* drivers-* net-* libs-* and build all targets.
962 - The values of the above variables are expanded in arch/$(ARCH)/Makefile.
963 5) All object files are then linked and the resulting file vmlinux is
964 located at the root of the obj tree.
965 The very first objects linked are listed in head-y, assigned by
966 arch/$(ARCH)/Makefile.
967 6) Finally, the architecture-specific part does any required post processing
968 and builds the final bootimage.
969 - This includes building boot records
970 - Preparing initrd images and the like
973 7.1 Set variables to tweak the build to the architecture
974 --------------------------------------------------------
977 Generic $(LD) options
979 Flags used for all invocations of the linker.
980 Often specifying the emulation is sufficient.
985 KBUILD_LDFLAGS := -m elf_s390
987 Note: ldflags-y can be used to further customise
988 the flags used. See section 3.7.
991 Options for $(LD) when linking vmlinux
993 LDFLAGS_vmlinux is used to specify additional flags to pass to
994 the linker when linking the final vmlinux image.
995 LDFLAGS_vmlinux uses the LDFLAGS_$@ support.
1000 LDFLAGS_vmlinux := -e stext
1005 When $(call if_changed,objcopy) is used to translate a .o file,
1006 the flags specified in OBJCOPYFLAGS will be used.
1007 $(call if_changed,objcopy) is often used to generate raw binaries on
1013 OBJCOPYFLAGS := -O binary
1015 #arch/s390/boot/Makefile
1016 $(obj)/image: vmlinux FORCE
1017 $(call if_changed,objcopy)
1019 In this example, the binary $(obj)/image is a binary version of
1020 vmlinux. The usage of $(call if_changed,xxx) will be described later.
1025 Default value - see top level Makefile
1026 Append or modify as required per architecture.
1030 #arch/sparc64/Makefile
1031 KBUILD_AFLAGS += -m64 -mcpu=ultrasparc
1034 $(CC) compiler flags
1036 Default value - see top level Makefile
1037 Append or modify as required per architecture.
1039 Often, the KBUILD_CFLAGS variable depends on the configuration.
1043 #arch/x86/boot/compressed/Makefile
1044 cflags-$(CONFIG_X86_32) := -march=i386
1045 cflags-$(CONFIG_X86_64) := -mcmodel=small
1046 KBUILD_CFLAGS += $(cflags-y)
1048 Many arch Makefiles dynamically run the target C compiler to
1049 probe supported options::
1054 cflags-$(CONFIG_MPENTIUMII) += $(call cc-option,\
1055 -march=pentium2,-march=i686)
1057 # Disable unit-at-a-time mode ...
1058 KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time)
1062 The first example utilises the trick that a config option expands
1063 to 'y' when selected.
1065 KBUILD_AFLAGS_KERNEL
1066 Assembler options specific for built-in
1068 $(KBUILD_AFLAGS_KERNEL) contains extra C compiler flags used to compile
1069 resident kernel code.
1071 KBUILD_AFLAGS_MODULE
1072 Assembler options specific for modules
1074 $(KBUILD_AFLAGS_MODULE) is used to add arch-specific options that
1075 are used for assembler.
1077 From commandline AFLAGS_MODULE shall be used (see kbuild.rst).
1079 KBUILD_CFLAGS_KERNEL
1080 $(CC) options specific for built-in
1082 $(KBUILD_CFLAGS_KERNEL) contains extra C compiler flags used to compile
1083 resident kernel code.
1085 KBUILD_CFLAGS_MODULE
1086 Options for $(CC) when building modules
1088 $(KBUILD_CFLAGS_MODULE) is used to add arch-specific options that
1090 From commandline CFLAGS_MODULE shall be used (see kbuild.rst).
1092 KBUILD_LDFLAGS_MODULE
1093 Options for $(LD) when linking modules
1095 $(KBUILD_LDFLAGS_MODULE) is used to add arch-specific options
1096 used when linking modules. This is often a linker script.
1098 From commandline LDFLAGS_MODULE shall be used (see kbuild.rst).
1102 The linker script with full path. Assigned by the top-level Makefile.
1106 The module linker script with full path. Assigned by the top-level
1107 Makefile and additionally by the arch Makefile.
1111 All object files for vmlinux. They are linked to vmlinux in the same
1112 order as listed in KBUILD_VMLINUX_OBJS.
1116 All .a "lib" files for vmlinux. KBUILD_VMLINUX_OBJS and
1117 KBUILD_VMLINUX_LIBS together specify all the object files used to
1120 7.2 Add prerequisites to archheaders
1121 ------------------------------------
1123 The archheaders: rule is used to generate header files that
1124 may be installed into user space by "make header_install".
1126 It is run before "make archprepare" when run on the
1127 architecture itself.
1130 7.3 Add prerequisites to archprepare
1131 ------------------------------------
1133 The archprepare: rule is used to list prerequisites that need to be
1134 built before starting to descend down in the subdirectories.
1135 This is usually used for header files containing assembler constants.
1140 archprepare: maketools
1142 In this example, the file target maketools will be processed
1143 before descending down in the subdirectories.
1144 See also chapter XXX-TODO that describes how kbuild supports
1145 generating offset header files.
1148 7.4 List directories to visit when descending
1149 ---------------------------------------------
1151 An arch Makefile cooperates with the top Makefile to define variables
1152 which specify how to build the vmlinux file. Note that there is no
1153 corresponding arch-specific section for modules; the module-building
1154 machinery is all architecture-independent.
1157 head-y, init-y, core-y, libs-y, drivers-y, net-y
1158 $(head-y) lists objects to be linked first in vmlinux.
1160 $(libs-y) lists directories where a lib.a archive can be located.
1162 The rest list directories where a built-in.a object file can be
1165 $(init-y) objects will be located after $(head-y).
1167 Then the rest follows in this order:
1169 $(core-y), $(libs-y), $(drivers-y) and $(net-y).
1171 The top level Makefile defines values for all generic directories,
1172 and arch/$(ARCH)/Makefile only adds architecture-specific
1177 #arch/sparc64/Makefile
1178 core-y += arch/sparc64/kernel/
1179 libs-y += arch/sparc64/prom/ arch/sparc64/lib/
1180 drivers-$(CONFIG_OPROFILE) += arch/sparc64/oprofile/
1183 7.5 Architecture-specific boot images
1184 -------------------------------------
1186 An arch Makefile specifies goals that take the vmlinux file, compress
1187 it, wrap it in bootstrapping code, and copy the resulting files
1188 somewhere. This includes various kinds of installation commands.
1189 The actual goals are not standardized across architectures.
1191 It is common to locate any additional processing in a boot/
1192 directory below arch/$(ARCH)/.
1194 Kbuild does not provide any smart way to support building a
1195 target specified in boot/. Therefore arch/$(ARCH)/Makefile shall
1196 call make manually to build a target in boot/.
1198 The recommended approach is to include shortcuts in
1199 arch/$(ARCH)/Makefile, and use the full path when calling down
1200 into the arch/$(ARCH)/boot/Makefile.
1205 boot := arch/x86/boot
1207 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
1209 "$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke
1210 make in a subdirectory.
1212 There are no rules for naming architecture-specific targets,
1213 but executing "make help" will list all relevant targets.
1214 To support this, $(archhelp) must be defined.
1220 echo '* bzImage - Image (arch/$(ARCH)/boot/bzImage)'
1223 When make is executed without arguments, the first goal encountered
1224 will be built. In the top level Makefile the first goal present
1226 An architecture shall always, per default, build a bootable image.
1227 In "make help", the default goal is highlighted with a '*'.
1228 Add a new prerequisite to all: to select a default goal different
1236 When "make" is executed without arguments, bzImage will be built.
1238 7.6 Building non-kbuild targets
1239 -------------------------------
1242 extra-y specifies additional targets created in the current
1243 directory, in addition to any targets specified by `obj-*`.
1245 Listing all targets in extra-y is required for two purposes:
1247 1) Enable kbuild to check changes in command lines
1249 - When $(call if_changed,xxx) is used
1251 2) kbuild knows what files to delete during "make clean"
1255 #arch/x86/kernel/Makefile
1256 extra-y := head.o init_task.o
1258 In this example, extra-y is used to list object files that
1259 shall be built, but shall not be linked as part of built-in.a.
1261 7.7 Commands useful for building a boot image
1262 ---------------------------------------------
1264 Kbuild provides a few macros that are useful when building a
1268 if_changed is the infrastructure used for the following commands.
1272 target: source(s) FORCE
1273 $(call if_changed,ld/objcopy/gzip/...)
1275 When the rule is evaluated, it is checked to see if any files
1276 need an update, or the command line has changed since the last
1277 invocation. The latter will force a rebuild if any options
1278 to the executable have changed.
1279 Any target that utilises if_changed must be listed in $(targets),
1280 otherwise the command line check will fail, and the target will
1282 Assignments to $(targets) are without $(obj)/ prefix.
1283 if_changed may be used in conjunction with custom commands as
1284 defined in 7.8 "Custom kbuild commands".
1286 Note: It is a typical mistake to forget the FORCE prerequisite.
1287 Another common pitfall is that whitespace is sometimes
1288 significant; for instance, the below will fail (note the extra space
1291 target: source(s) FORCE
1293 **WRONG!** $(call if_changed, ld/objcopy/gzip/...)
1296 if_changed should not be used more than once per target.
1297 It stores the executed command in a corresponding .cmd
1299 file and multiple calls would result in overwrites and
1300 unwanted results when the target is up to date and only the
1301 tests on changed commands trigger execution of commands.
1304 Link target. Often, LDFLAGS_$@ is used to set specific options to ld.
1308 #arch/x86/boot/Makefile
1309 LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary
1310 LDFLAGS_setup := -Ttext 0x0 -s --oformat binary -e begtext
1312 targets += setup setup.o bootsect bootsect.o
1313 $(obj)/setup $(obj)/bootsect: %: %.o FORCE
1314 $(call if_changed,ld)
1316 In this example, there are two possible targets, requiring different
1317 options to the linker. The linker options are specified using the
1318 LDFLAGS_$@ syntax - one for each potential target.
1319 $(targets) are assigned all potential targets, by which kbuild knows
1320 the targets and will:
1322 1) check for commandline changes
1323 2) delete target during make clean
1325 The ": %: %.o" part of the prerequisite is a shorthand that
1326 frees us from listing the setup.o and bootsect.o files.
1329 It is a common mistake to forget the "targets :=" assignment,
1330 resulting in the target file being recompiled for no
1334 Copy binary. Uses OBJCOPYFLAGS usually specified in
1335 arch/$(ARCH)/Makefile.
1336 OBJCOPYFLAGS_$@ may be used to set additional options.
1339 Compress target. Use maximum compression to compress target.
1343 #arch/x86/boot/compressed/Makefile
1344 $(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE
1345 $(call if_changed,gzip)
1348 Create flattened device tree blob object suitable for linking
1349 into vmlinux. Device tree blobs linked into vmlinux are placed
1350 in an init section in the image. Platform code *must* copy the
1351 blob to non-init memory prior to calling unflatten_device_tree().
1353 To use this command, simply add `*.dtb` into obj-y or targets, or make
1354 some other target depend on `%.dtb`
1356 A central rule exists to create `$(obj)/%.dtb` from `$(src)/%.dts`;
1357 architecture Makefiles do no need to explicitly write out that rule.
1362 DTC_FLAGS ?= -p 1024
1364 7.8 Custom kbuild commands
1365 --------------------------
1367 When kbuild is executing with KBUILD_VERBOSE=0, then only a shorthand
1368 of a command is normally displayed.
1369 To enable this behaviour for custom commands kbuild requires
1370 two variables to be set::
1372 quiet_cmd_<command> - what shall be echoed
1373 cmd_<command> - the command to execute
1378 quiet_cmd_image = BUILD $@
1379 cmd_image = $(obj)/tools/build $(BUILDFLAGS) \
1380 $(obj)/vmlinux.bin > $@
1383 $(obj)/bzImage: $(obj)/vmlinux.bin $(obj)/tools/build FORCE
1384 $(call if_changed,image)
1385 @echo 'Kernel: $@ is ready'
1387 When updating the $(obj)/bzImage target, the line:
1389 BUILD arch/x86/boot/bzImage
1391 will be displayed with "make KBUILD_VERBOSE=0".
1394 7.9 Preprocessing linker scripts
1395 --------------------------------
1397 When the vmlinux image is built, the linker script
1398 arch/$(ARCH)/kernel/vmlinux.lds is used.
1399 The script is a preprocessed variant of the file vmlinux.lds.S
1400 located in the same directory.
1401 kbuild knows .lds files and includes a rule `*lds.S` -> `*lds`.
1405 #arch/x86/kernel/Makefile
1406 extra-y := vmlinux.lds
1409 export CPPFLAGS_vmlinux.lds += -P -C -U$(ARCH)
1411 The assignment to extra-y is used to tell kbuild to build the
1413 The assignment to $(CPPFLAGS_vmlinux.lds) tells kbuild to use the
1414 specified options when building the target vmlinux.lds.
1416 When building the `*.lds` target, kbuild uses the variables::
1418 KBUILD_CPPFLAGS : Set in top-level Makefile
1419 cppflags-y : May be set in the kbuild makefile
1420 CPPFLAGS_$(@F) : Target-specific flags.
1421 Note that the full filename is used in this
1424 The kbuild infrastructure for `*lds` files is used in several
1425 architecture-specific files.
1427 7.10 Generic header files
1428 -------------------------
1430 The directory include/asm-generic contains the header files
1431 that may be shared between individual architectures.
1432 The recommended approach how to use a generic header file is
1433 to list the file in the Kbuild file.
1434 See "8.2 generic-y" for further info on syntax etc.
1439 If the file arch/xxx/Makefile.postlink exists, this makefile
1440 will be invoked for post-link objects (vmlinux and modules.ko)
1441 for architectures to run post-link passes on. Must also handle
1444 This pass runs after kallsyms generation. If the architecture
1445 needs to modify symbol locations, rather than manipulate the
1446 kallsyms, it may be easier to add another postlink target for
1447 .tmp_vmlinux? targets to be called from link-vmlinux.sh.
1449 For example, powerpc uses this to check relocation sanity of
1450 the linked vmlinux file.
1452 8 Kbuild syntax for exported headers
1453 ------------------------------------
1455 The kernel includes a set of headers that is exported to userspace.
1456 Many headers can be exported as-is but other headers require a
1457 minimal pre-processing before they are ready for user-space.
1458 The pre-processing does:
1460 - drop kernel-specific annotations
1461 - drop include of compiler.h
1462 - drop all sections that are kernel internal (guarded by `ifdef __KERNEL__`)
1464 All headers under include/uapi/, include/generated/uapi/,
1465 arch/<arch>/include/uapi/ and arch/<arch>/include/generated/uapi/
1468 A Kbuild file may be defined under arch/<arch>/include/uapi/asm/ and
1469 arch/<arch>/include/asm/ to list asm files coming from asm-generic.
1470 See subsequent chapter for the syntax of the Kbuild file.
1472 8.1 no-export-headers
1473 ---------------------
1475 no-export-headers is essentially used by include/uapi/linux/Kbuild to
1476 avoid exporting specific headers (e.g. kvm.h) on architectures that do
1477 not support it. It should be avoided as much as possible.
1482 If an architecture uses a verbatim copy of a header from
1483 include/asm-generic then this is listed in the file
1484 arch/$(ARCH)/include/asm/Kbuild like this:
1488 #arch/x86/include/asm/Kbuild
1489 generic-y += termios.h
1492 During the prepare phase of the build a wrapper include
1493 file is generated in the directory::
1495 arch/$(ARCH)/include/generated/asm
1497 When a header is exported where the architecture uses
1498 the generic header a similar wrapper is generated as part
1499 of the set of exported headers in the directory::
1503 The generated wrapper will in both cases look like the following:
1505 Example: termios.h::
1507 #include <asm-generic/termios.h>
1512 If an architecture generates other header files alongside generic-y
1513 wrappers, generated-y specifies them.
1515 This prevents them being treated as stale asm-generic wrappers and
1520 #arch/x86/include/asm/Kbuild
1521 generated-y += syscalls_32.h
1526 mandatory-y is essentially used by include/(uapi/)asm-generic/Kbuild
1527 to define the minimum set of ASM headers that all architectures must have.
1529 This works like optional generic-y. If a mandatory header is missing
1530 in arch/$(ARCH)/include/(uapi/)/asm, Kbuild will automatically generate
1531 a wrapper of the asm-generic one.
1536 The top Makefile exports the following variables:
1538 VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION
1539 These variables define the current kernel version. A few arch
1540 Makefiles actually use these values directly; they should use
1541 $(KERNELRELEASE) instead.
1543 $(VERSION), $(PATCHLEVEL), and $(SUBLEVEL) define the basic
1544 three-part version number, such as "2", "4", and "0". These three
1545 values are always numeric.
1547 $(EXTRAVERSION) defines an even tinier sublevel for pre-patches
1548 or additional patches. It is usually some non-numeric string
1549 such as "-pre4", and is often blank.
1552 $(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable
1553 for constructing installation directory names or showing in
1554 version strings. Some arch Makefiles use it for this purpose.
1557 This variable defines the target architecture, such as "i386",
1558 "arm", or "sparc". Some kbuild Makefiles test $(ARCH) to
1559 determine which files to compile.
1561 By default, the top Makefile sets $(ARCH) to be the same as the
1562 host system architecture. For a cross build, a user may
1563 override the value of $(ARCH) on the command line::
1569 This variable defines a place for the arch Makefiles to install
1570 the resident kernel image and System.map file.
1571 Use this for architecture-specific install targets.
1573 INSTALL_MOD_PATH, MODLIB
1574 $(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module
1575 installation. This variable is not defined in the Makefile but
1576 may be passed in by the user if desired.
1578 $(MODLIB) specifies the directory for module installation.
1579 The top Makefile defines $(MODLIB) to
1580 $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE). The user may
1581 override this value on the command line if desired.
1584 If this variable is specified, it will cause modules to be stripped
1585 after they are installed. If INSTALL_MOD_STRIP is '1', then the
1586 default option --strip-debug will be used. Otherwise, the
1587 INSTALL_MOD_STRIP value will be used as the option(s) to the strip
1591 10 Makefile language
1592 ====================
1594 The kernel Makefiles are designed to be run with GNU Make. The Makefiles
1595 use only the documented features of GNU Make, but they do use many
1598 GNU Make supports elementary list-processing functions. The kernel
1599 Makefiles use a novel style of list building and manipulation with few
1602 GNU Make has two assignment operators, ":=" and "=". ":=" performs
1603 immediate evaluation of the right-hand side and stores an actual string
1604 into the left-hand side. "=" is like a formula definition; it stores the
1605 right-hand side in an unevaluated form and then evaluates this form each
1606 time the left-hand side is used.
1608 There are some cases where "=" is appropriate. Usually, though, ":="
1609 is the right choice.
1614 - Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net>
1615 - Updates by Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de>
1616 - Updates by Sam Ravnborg <sam@ravnborg.org>
1617 - Language QA by Jan Engelhardt <jengelh@gmx.de>
1622 - Describe how kbuild supports shipped files with _shipped.
1623 - Generating offset header files.
1624 - Add more variables to chapters 7 or 9?