1 .. SPDX-License-Identifier: GPL-2.0
14 Datasheet: Not published
16 Author: Guenter Roeck <linux@roeck-us.net>
22 This driver supports the MAX16601 VR13.HC Dual-Output Voltage Regulator
25 The driver is a client driver to the core PMBus driver.
26 Please see Documentation/hwmon/pmbus.rst for details on PMBus client drivers.
32 This driver does not auto-detect devices. You will have to instantiate the
33 devices explicitly. Please see Documentation/i2c/instantiating-devices.rst for
40 The driver supports standard PMBus driver platform data.
46 The following attributes are supported.
48 ======================= =======================================================
50 in1_input VCORE input voltage.
51 in1_alarm Input voltage alarm.
54 in2_input VCORE output voltage.
55 in2_alarm Output voltage alarm.
58 curr1_input VCORE input current, derived from duty cycle and output
60 curr1_max Maximum input current.
61 curr1_max_alarm Current high alarm.
64 curr2_input VCORE phase 0 input current.
67 curr3_input VCORE phase 1 input current.
70 curr4_input VCORE phase 2 input current.
73 curr5_input VCORE phase 3 input current.
76 curr6_input VCORE phase 4 input current.
79 curr7_input VCORE phase 5 input current.
82 curr8_input VCORE phase 6 input current.
85 curr9_input VCORE phase 7 input current.
88 curr10_input VCORE input current, derived from sensor element.
91 curr11_input VSA input current.
94 curr12_input VCORE output current.
95 curr12_crit Critical output current.
96 curr12_crit_alarm Output current critical alarm.
97 curr12_max Maximum output current.
98 curr12_max_alarm Output current high alarm.
100 curr13_label "iout1.0"
101 curr13_input VCORE phase 0 output current.
103 curr14_label "iout1.1"
104 curr14_input VCORE phase 1 output current.
106 curr15_label "iout1.2"
107 curr15_input VCORE phase 2 output current.
109 curr16_label "iout1.3"
110 curr16_input VCORE phase 3 output current.
112 curr17_label "iout1.4"
113 curr17_input VCORE phase 4 output current.
115 curr18_label "iout1.5"
116 curr18_input VCORE phase 5 output current.
118 curr19_label "iout1.6"
119 curr19_input VCORE phase 6 output current.
121 curr20_label "iout1.7"
122 curr20_input VCORE phase 7 output current.
125 curr21_input VSA output current.
126 curr21_highest Historical maximum VSA output current.
127 curr21_reset_history Write any value to reset curr21_highest.
128 curr21_crit Critical output current.
129 curr21_crit_alarm Output current critical alarm.
130 curr21_max Maximum output current.
131 curr21_max_alarm Output current high alarm.
134 power1_input Input power, derived from duty cycle and output current.
135 power1_alarm Input power alarm.
138 power2_input Input power, derived from input current sensor.
141 power3_input Output power.
143 temp1_input VCORE temperature.
144 temp1_crit Critical high temperature.
145 temp1_crit_alarm Chip temperature critical high alarm.
146 temp1_max Maximum temperature.
147 temp1_max_alarm Chip temperature high alarm.
149 temp2_input TSENSE_0 temperature
150 temp3_input TSENSE_1 temperature
151 temp4_input TSENSE_2 temperature
152 temp5_input TSENSE_3 temperature
154 temp6_input VSA temperature.
155 temp6_crit Critical high temperature.
156 temp6_crit_alarm Chip temperature critical high alarm.
157 temp6_max Maximum temperature.
158 temp6_max_alarm Chip temperature high alarm.
159 ======================= =======================================================