1 Xilinx AXI/PLB soft-core watchdog Device Tree Bindings
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5 - compatible : Should be "xlnx,xps-timebase-wdt-1.00.a" or
6 "xlnx,xps-timebase-wdt-1.01.a".
7 - reg : Physical base address and size
10 - clocks : Input clock specifier. Refer to common clock
12 - clock-frequency : Frequency of clock in Hz
13 - xlnx,wdt-enable-once : 0 - Watchdog can be restarted
14 1 - Watchdog can be enabled just once
15 - xlnx,wdt-interval : Watchdog timeout interval in 2^<val> clock cycles,
16 <val> is integer from 8 to 31.
19 axi-timebase-wdt@40100000 {
20 clock-frequency = <50000000>;
21 compatible = "xlnx,xps-timebase-wdt-1.00.a";
23 reg = <0x40100000 0x10000>;
24 xlnx,wdt-enable-once = <0x0>;
25 xlnx,wdt-interval = <0x1b>;