1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/usb/snps,dwc3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare USB3 Controller
10 - Felipe Balbi <balbi@kernel.org>
13 This is usually a subnode to DWC3 glue to which it is connected, but can also
14 be presented as a standalone DT node with an optional vendor-specific
36 - const: synopsys,dwc3
44 It's either a single common DWC3 interrupt (dwc_usb3) or individual
45 interrupts for the host, gadget and DRD modes.
55 enum: [host, peripheral, otg]
59 In general the core supports three types of clocks. bus_early is a
60 SoC Bus Clock (AHB/AXI/Native). ref generates ITP when the UTMI/ULPI
61 PHY is suspended. suspend clocks a small part of the USB3 core when
62 SS PHY in P3. But particular cases may differ from that having less
63 or more clock sources with another names.
68 - enum: [bus_early, ref, suspend]
79 - description: USB2/HS PHY
80 - description: USB3/SS PHY
97 snps,usb2-lpm-disable:
98 description: Indicate if we don't want to enable USB2 HW LPM for host
102 snps,usb3_lpm_capable:
103 description: Determines if platform is USB3 LPM capable
106 snps,usb2-gadget-lpm-disable:
107 description: Indicate if we don't want to enable USB2 HW LPM for gadget
111 snps,dis-start-transfer-quirk:
113 When set, disable isoc START TRANSFER command failure SW work-around
114 for DWC_usb31 version 1.70a-ea06 and prior.
117 snps,disable_scramble_quirk:
119 True when SW should disable data scrambling. Only really useful for FPGA
123 snps,has-lpm-erratum:
124 description: True when DWC3 was configured with LPM Erratum enabled
127 snps,lpm-nyet-threshold:
128 description: LPM NYET threshold
129 $ref: /schemas/types.yaml#/definitions/uint8
131 snps,u2exit_lfps_quirk:
132 description: Set if we want to enable u2exit lfps quirk
135 snps,u2ss_inp3_quirk:
136 description: Set if we enable P3 OK for U2/SS Inactive quirk
139 snps,req_p1p2p3_quirk:
141 When set, the core will always request for P1/P2/P3 transition sequence.
144 snps,del_p1p2p3_quirk:
146 When set core will delay P1/P2/P3 until a certain amount of 8B10B errors
150 snps,del_phy_power_chg_quirk:
151 description: When set core will delay PHY power change from P0 to P1/P2/P3.
154 snps,lfps_filter_quirk:
155 description: When set core will filter LFPS reception.
158 snps,rx_detect_poll_quirk:
160 when set core will disable a 400us delay to start Polling LFPS after
164 snps,tx_de_emphasis_quirk:
165 description: When set core will set Tx de-emphasis value
170 The value driven to the PHY is controlled by the LTSSM during USB3
172 $ref: /schemas/types.yaml#/definitions/uint8
174 - 0 # -6dB de-emphasis
175 - 1 # -3.5dB de-emphasis
178 snps,dis_u3_susphy_quirk:
179 description: When set core will disable USB3 suspend phy
182 snps,dis_u2_susphy_quirk:
183 description: When set core will disable USB2 suspend phy
186 snps,dis_enblslpm_quirk:
188 When set clears the enblslpm in GUSB2PHYCFG, disabling the suspend signal
192 snps,dis-u1-entry-quirk:
193 description: Set if link entering into U1 needs to be disabled
196 snps,dis-u2-entry-quirk:
197 description: Set if link entering into U2 needs to be disabled
200 snps,dis_rxdet_inp3_quirk:
202 When set core will disable receiver detection in PHY P3 power state.
205 snps,dis-u2-freeclk-exists-quirk:
207 When set, clear the u2_freeclk_exists in GUSB2PHYCFG, specify that USB2
208 PHY doesn't provide a free-running PHY clock.
211 snps,dis-del-phy-power-chg-quirk:
213 When set core will change PHY power from P0 to P1/P2/P3 without delay.
216 snps,dis-tx-ipgap-linecheck-quirk:
217 description: When set, disable u2mac linestate check during HS transmit
220 snps,parkmode-disable-ss-quirk:
222 When set, all SuperSpeed bus instances in park mode are disabled.
225 snps,dis_metastability_quirk:
227 When set, disable metastability workaround. CAUTION! Use only if you are
228 absolutely sure of it.
231 snps,dis-split-quirk:
233 When set, change the way URBs are handled by the driver. Needed to
234 avoid -EPROTO errors with usbhid on some devices (Hikey 970).
237 snps,gfladj-refclk-lpm-sel-quirk:
239 When set, run the SOF/ITP counter based on ref_clk.
242 snps,resume-hs-terminations:
244 Fix the issue of HS terminations CRC error on resume by enabling this
245 quirk. When set, all the termsel, xcvrsel, opmode becomes 0 during end
246 of resume. This option is to support certain legacy ULPI PHYs.
249 snps,is-utmi-l1-suspend:
251 True when DWC3 asserts output signal utmi_l1_suspend_n, false when
252 asserts utmi_sleep_n.
256 description: HIRD threshold
257 $ref: /schemas/types.yaml#/definitions/uint8
259 snps,hsphy_interface:
261 High-Speed PHY interface selection between UTMI+ and ULPI when the
262 DWC_USB3_HSPHY_INTERFACE has value 3.
263 $ref: /schemas/types.yaml#/definitions/string
266 snps,quirk-frame-length-adjustment:
268 Value for GFLADJ_30MHZ field of GFLADJ register for post-silicon frame
269 length adjustment when the fladj_30mhz_sdbnd signal is invalid or
271 $ref: /schemas/types.yaml#/definitions/uint32
275 snps,ref-clock-period-ns:
277 Value for REFCLKPER field of GUCTL register for reference clock period in
278 nanoseconds, when the hardware set default does not match the actual
281 This binding is deprecated. Instead, provide an appropriate reference clock.
286 snps,rx-thr-num-pkt-prd:
288 Periodic ESS RX packet threshold count (host mode only). Set this and
289 snps,rx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31
290 programming guide section 1.2.4) to enable periodic ESS RX threshold.
291 $ref: /schemas/types.yaml#/definitions/uint8
295 snps,rx-max-burst-prd:
297 Max periodic ESS RX burst size (host mode only). Set this and
298 snps,rx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31
299 programming guide section 1.2.4) to enable periodic ESS RX threshold.
300 $ref: /schemas/types.yaml#/definitions/uint8
304 snps,tx-thr-num-pkt-prd:
306 Periodic ESS TX packet threshold count (host mode only). Set this and
307 snps,tx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31
308 programming guide section 1.2.3) to enable periodic ESS TX threshold.
309 $ref: /schemas/types.yaml#/definitions/uint8
313 snps,tx-max-burst-prd:
315 Max periodic ESS TX burst size (host mode only). Set this and
316 snps,tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31
317 programming guide section 1.2.3) to enable periodic ESS TX threshold.
318 $ref: /schemas/types.yaml#/definitions/uint8
323 description: Determines if the TX fifos can be dynamically resized depending
324 on the number of IN endpoints used and if bursting is supported. This
325 may help improve bandwidth on platforms with higher system latencies, as
326 increased fifo space allows for the controller to prefetch data into its
331 description: Specifies the max number of packets the txfifo resizing logic
332 can account for when higher endpoint bursting is used. (bMaxBurst > 6) The
333 higher the number, the more fifo space the txfifo resizing logic will
334 allocate for that endpoint.
335 $ref: /schemas/types.yaml#/definitions/uint8
338 snps,incr-burst-type-adjustment:
340 Value for INCR burst type of GSBUSCFG0 register, undefined length INCR
341 burst type enable and INCRx type. A single value means INCRX burst mode
342 enabled. If more than one value specified, undefined length INCR burst
343 type will be enabled with burst lengths utilized up to the maximum
344 of the values passed in this property.
345 $ref: /schemas/types.yaml#/definitions/uint32-array
350 enum: [1, 4, 8, 16, 32, 64, 128, 256]
353 $ref: /schemas/graph.yaml#/properties/port
355 This port is used with the 'usb-role-switch' property to connect the
356 dwc3 to type C connector.
359 $ref: /schemas/types.yaml#/definitions/flag
361 Enable USB remote wakeup.
363 unevaluatedProperties: false
373 compatible = "snps,dwc3";
374 reg = <0x4a030000 0xcfff>;
375 interrupts = <0 92 4>;
376 usb-phy = <&usb2_phy>, <&usb3_phy>;
377 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
381 compatible = "snps,dwc3";
382 reg = <0x4a000000 0xcfff>;
383 interrupts = <0 92 4>;
384 clocks = <&clk 1>, <&clk 2>, <&clk 3>;
385 clock-names = "bus_early", "ref", "suspend";
386 phys = <&usb2_phy>, <&usb3_phy>;
387 phy-names = "usb2-phy", "usb3-phy";
388 snps,dis_u2_susphy_quirk;
389 snps,dis_enblslpm_quirk;