Documentation/devicetree/bindings/usb/onnn,nb7vpq904m.yaml

   1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/usb/onnn,nb7vpq904m.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: ON Semiconductor Type-C DisplayPort ALT Mode Linear Redriver
   8
   9 maintainers:
  10   - Neil Armstrong <neil.armstrong@linaro.org>
  11
  12 properties:
  13   compatible:
  14     enum:
  15       - onnn,nb7vpq904m
  16
  17   reg:
  18     maxItems: 1
  19
  20   vcc-supply:
  21     description: power supply (1.8V)
  22
  23   enable-gpios: true
  24
  25   retimer-switch:
  26     description: Flag the port as possible handle of SuperSpeed signals retiming
  27     type: boolean
  28
  29   orientation-switch:
  30     description: Flag the port as possible handler of orientation switching
  31     type: boolean
  32
  33   ports:
  34     $ref: /schemas/graph.yaml#/properties/ports
  35     properties:
  36       port@0:
  37         $ref: /schemas/graph.yaml#/properties/port
  38         description: Super Speed (SS) Output endpoint to the Type-C connector
  39
  40       port@1:
  41         $ref: /schemas/graph.yaml#/$defs/port-base
  42         description: Super Speed (SS) Input endpoint from the Super-Speed PHY
  43         unevaluatedProperties: false
  44
  45         properties:
  46           endpoint:
  47             $ref: /schemas/graph.yaml#/$defs/endpoint-base
  48             unevaluatedProperties: false
  49
  50             properties:
  51               data-lanes:
  52                 $ref: /schemas/types.yaml#/definitions/uint32-array
  53                 description: |
  54                   An array of physical data lane indexes. Position determines how
  55                   lanes are connected to the redriver, It is assumed the same order
  56                   is kept on the other side of the redriver.
  57                   Lane number represents the following
  58                   - 0 is RX2 lane
  59                   - 1 is TX2 lane
  60                   - 2 is TX1 lane
  61                   - 3 is RX1 lane
  62                   The position determines the physical port of the redriver, in the
  63                   order A, B, C & D.
  64                 oneOf:
  65                   - items:
  66                       - const: 0
  67                       - const: 1
  68                       - const: 2
  69                       - const: 3
  70                     description: |
  71                       This is the lanes default layout
  72                       - Port A to RX2 lane
  73                       - Port B to TX2 lane
  74                       - Port C to TX1 lane
  75                       - Port D to RX1 lane
  76                   - items:
  77                       - const: 3
  78                       - const: 2
  79                       - const: 1
  80                       - const: 0
  81                     description: |
  82                       This is the USBRX2/USBTX2 and USBRX1/USBTX1 swapped lanes layout
  83                       - Port A to RX1 lane
  84                       - Port B to TX1 lane
  85                       - Port C to TX2 lane
  86                       - Port D to RX2 lane
  87
  88       port@2:
  89         $ref: /schemas/graph.yaml#/properties/port
  90         description:
  91           Sideband Use (SBU) AUX lines endpoint to the Type-C connector for the purpose of
  92           handling altmode muxing and orientation switching.
  93
  94 required:
  95   - compatible
  96   - reg
  97
  98 additionalProperties: false
  99
 100 examples:
 101   - |
 102     i2c {
 103         #address-cells = <1>;
 104         #size-cells = <0>;
 105
 106         typec-mux@32 {
 107             compatible = "onnn,nb7vpq904m";
 108             reg = <0x32>;
 109
 110             vcc-supply = <&vreg_l15b_1p8>;
 111
 112             retimer-switch;
 113             orientation-switch;
 114
 115             ports {
 116                 #address-cells = <1>;
 117                 #size-cells = <0>;
 118
 119                 port@0 {
 120                     reg = <0>;
 121                     usb_con_ss: endpoint {
 122                         remote-endpoint = <&typec_con_ss>;
 123                     };
 124                 };
 125                 port@1 {
 126                     reg = <1>;
 127                     phy_con_ss: endpoint {
 128                         remote-endpoint = <&usb_phy_ss>;
 129                         data-lanes = <3 2 1 0>;
 130                     };
 131                 };
 132                 port@2 {
 133                     reg = <2>;
 134                     usb_con_sbu: endpoint {
 135                         remote-endpoint = <&typec_dp_aux>;
 136                     };
 137                 };
 138             };
 139         };
 140     };
 141 ...