1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2020 MediaTek
5 $id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek USB3 DRD Controller
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
17 The DRD controller has a glue layer IPPC (IP Port Control), and its host is
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
27 - mediatek,mt8186-mtu3
28 - mediatek,mt8188-mtu3
29 - mediatek,mt8192-mtu3
30 - mediatek,mt8195-mtu3
31 - mediatek,mt8365-mtu3
32 - const: mediatek,mtu3
36 - description: the registers of device MAC
37 - description: the registers of IP Port Control
46 use "interrupts-extended" when the interrupts are connected to the
47 separate interrupt controllers
50 - description: SSUSB device controller interrupt
51 - description: optional, wakeup interrupt used to support runtime PM
59 description: A phandle to USB power domain node to control USB's MTCMOS
65 - description: Controller clock used by normal mode
66 - description: Reference clock used by low power mode etc
67 - description: Mcu bus clock for register access
68 - description: DMA bus clock for data transfer
69 - description: DRD controller clock
70 - description: Frame count clock
75 - const: sys_ck # required, others are optional
84 List of all the USB PHYs used, it's better to keep the sequence
85 as the hardware layout.
88 - description: USB2/HS PHY # required, others are optional
89 - description: USB3/SS(P) PHY
90 - description: USB2/HS PHY # the following for backward compatible
91 - description: USB3/SS(P) PHY
92 - description: USB2/HS PHY
93 - description: USB3/SS(P) PHY
94 - description: USB2/HS PHY
95 - description: USB3/SS(P) PHY
96 - description: USB2/HS PHY
99 description: Regulator of USB AVDD3.3v
104 Regulator of USB VBUS5v, needed when supports dual-role mode.
105 Particularly, if use an output GPIO to control a VBUS regulator, should
106 model it as a regulator. See bindings/regulator/fixed-regulator.yaml
107 It's considered valid for compatibility reasons, not allowed for
108 new bindings, and put into a usb-connector node.
111 enum: [host, peripheral, otg]
115 enum: [super-speed-plus, super-speed, high-speed, full-speed]
131 Phandle to the extcon device detecting the IDDIG state, needed
132 when supports dual-role mode.
133 It's considered valid for compatibility reasons, not allowed for
134 new bindings, and use "usb-role-switch" property instead.
137 $ref: /schemas/types.yaml#/definitions/flag
138 description: Support role switch.
141 role-switch-default-mode:
142 enum: [host, peripheral]
146 $ref: /schemas/connector/usb-connector.yaml#
148 Connector for dual role switch, especially for "gpio-usb-b-connector"
153 Any connector to the data bus of this controller should be modelled
154 using the OF graph bindings specified, if the "usb-role-switch"
155 property is used. See graph.txt
156 $ref: /schemas/graph.yaml#/properties/port
159 $ref: /schemas/types.yaml#/definitions/flag
161 supports manual dual-role switch via debugfs; usually used when
162 receptacle is TYPE-A and also wants to support dual-role mode.
166 description: enable USB remote wakeup, see power/wakeup-source.txt
169 mediatek,syscon-wakeup:
170 $ref: /schemas/types.yaml#/definitions/phandle-array
173 A phandle to syscon used to access the register of the USB wakeup glue
174 layer between xHCI and SPM, the field should always be 3 cells long.
178 The first cell represents a phandle to syscon
180 The second cell represents the register base address of the glue
183 The third cell represents the hardware version of the glue layer,
184 1 - used by mt8173 etc, revision 1 without following IPM rule;
185 2 - used by mt2712 etc, revision 2 with following IPM rule;
186 101 - used by mt8183, specific 1.01;
187 102 - used by mt8192, specific 1.02;
188 enum: [1, 2, 101, 102]
190 mediatek,u3p-dis-msk:
191 $ref: /schemas/types.yaml#/definitions/uint32
192 description: The mask to disable u3ports, bit0 for u3port0,
193 bit1 for u3port1, ... etc
195 mediatek,u2p-dis-msk:
196 $ref: /schemas/types.yaml#/definitions/uint32
197 description: The mask to disable u2ports, bit0 for u2port0,
198 bit1 for u2port1, ... etc; but can't disable u2port0 if dual role mode
199 is enabled, so will be skipped in this case.
201 # Required child node when support dual-role
205 $ref: /schemas/usb/mediatek,mtk-xhci.yaml#
207 The xhci should be added as subnode to mtu3 as shown in the following
208 example if the host mode is enabled.
211 connector: [ usb-role-switch ]
212 port: [ usb-role-switch ]
213 role-switch-default-mode: [ usb-role-switch ]
214 wakeup-source: [ 'mediatek,syscon-wakeup' ]
224 additionalProperties: false
227 # Dual role switch by extcon
229 #include <dt-bindings/clock/mt8173-clk.h>
230 #include <dt-bindings/interrupt-controller/arm-gic.h>
231 #include <dt-bindings/interrupt-controller/irq.h>
232 #include <dt-bindings/phy/phy.h>
233 #include <dt-bindings/power/mt8173-power.h>
236 compatible = "mediatek,mt8173-mtu3", "mediatek,mtu3";
237 reg = <0x11271000 0x3000>, <0x11280700 0x0100>;
238 reg-names = "mac", "ippc";
239 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
240 phys = <&phy_port0 PHY_TYPE_USB3>, <&phy_port1 PHY_TYPE_USB2>;
241 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
242 clocks = <&topckgen CLK_TOP_USB30_SEL>;
243 clock-names = "sys_ck";
244 vusb33-supply = <&mt6397_vusb_reg>;
245 vbus-supply = <&usb_p0_vbus>;
246 extcon = <&extcon_usb>;
249 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
250 #address-cells = <1>;
255 compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
256 reg = <0x11270000 0x1000>;
258 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
259 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
260 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
261 clock-names = "sys_ck", "ref_ck";
262 vusb33-supply = <&mt6397_vusb_reg>;
266 # Dual role switch by gpio-usb-b-connector
268 #include <dt-bindings/gpio/gpio.h>
269 #include <dt-bindings/power/mt2712-power.h>
272 compatible = "mediatek,mt2712-mtu3", "mediatek,mtu3";
273 reg = <0x112c1000 0x3000>, <0x112d0700 0x0100>;
274 reg-names = "mac", "ippc";
275 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_LOW>;
276 phys = <&u2port2 PHY_TYPE_USB2>;
277 power-domains = <&scpsys MT2712_POWER_DOMAIN_USB2>;
278 clocks = <&topckgen CLK_TOP_USB30_SEL>;
279 clock-names = "sys_ck";
282 #address-cells = <1>;
286 host0: usb@11270000 {
287 compatible = "mediatek,mt2712-xhci", "mediatek,mtk-xhci";
288 reg = <0x11270000 0x1000>;
290 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_LOW>;
291 power-domains = <&scpsys MT2712_POWER_DOMAIN_USB>;
292 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
293 clock-names = "sys_ck", "ref_ck";
297 compatible = "gpio-usb-b-connector", "usb-b-connector";
299 id-gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
300 vbus-supply = <&usb_p0_vbus>;
304 # Dual role switch with type-c
307 compatible = "mediatek,mt8183-mtu3", "mediatek,mtu3";
308 reg = <0x11201000 0x2e00>, <0x11203e00 0x0100>;
309 reg-names = "mac", "ippc";
310 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
311 phys = <&u2port0 PHY_TYPE_USB2>;
313 clock-names = "sys_ck";
314 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
318 role-switch-default-mode = "host";
319 #address-cells = <1>;
324 compatible = "mediatek,mt8183-xhci", "mediatek,mtk-xhci";
325 reg = <0x11200000 0x1000>;
327 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_LOW>;
329 clock-names = "sys_ck";
333 usb_role_sw: endpoint {
334 remote-endpoint = <&hs_ep>;