1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2020 MediaTek
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek USB3 xHCI
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: "usb-xhci.yaml"
17 There are two scenarios:
18 case 1: only supports xHCI driver;
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
22 # common properties for both case 1 and case 2
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
28 - mediatek,mt7622-xhci
29 - mediatek,mt7623-xhci
30 - mediatek,mt7629-xhci
31 - mediatek,mt8173-xhci
32 - mediatek,mt8183-xhci
33 - mediatek,mt8186-xhci
34 - mediatek,mt8188-xhci
35 - mediatek,mt8192-xhci
36 - mediatek,mt8195-xhci
37 - const: mediatek,mtk-xhci
42 - description: the registers of xHCI MAC
43 - description: the registers of IP Port Control
49 - const: ippc # optional, only needed for case 1.
53 use "interrupts-extended" when the interrupts are connected to the
54 separate interrupt controllers
57 - description: xHCI host controller interrupt
58 - description: optional, wakeup interrupt used to support runtime PM
67 description: A phandle to USB power domain node to control USB's MTCMOS
73 - description: Controller clock used by normal mode
74 - description: Reference clock used by low power mode etc
75 - description: Mcu bus clock for register access
76 - description: DMA bus clock for data transfer
77 - description: controller clock
82 - const: sys_ck # required, the following ones are optional
92 assigned-clock-parents:
98 List of all PHYs used on this HCD, it's better to keep PHYs in order
99 as the hardware layout
102 - description: USB2/HS PHY # required, others are optional
103 - description: USB3/SS(P) PHY
104 - description: USB2/HS PHY
105 - description: USB3/SS(P) PHY
106 - description: USB2/HS PHY
107 - description: USB3/SS(P) PHY
108 - description: USB2/HS PHY
109 - description: USB3/SS(P) PHY
110 - description: USB2/HS PHY
113 description: Regulator of USB AVDD3.3v
116 description: Regulator of USB VBUS5v
121 usb3-lpm-capable: true
123 usb2-lpm-disable: true
127 Interrupt moderation interval value, it is 8 times as much as that
128 defined in the xHCI spec on MTK's controller.
131 # the following properties are only used for case 1
133 description: enable USB remote wakeup, see power/wakeup-source.txt
136 mediatek,syscon-wakeup:
137 $ref: /schemas/types.yaml#/definitions/phandle-array
140 A phandle to syscon used to access the register of the USB wakeup glue
141 layer between xHCI and SPM, the field should always be 3 cells long.
145 The first cell represents a phandle to syscon
147 The second cell represents the register base address of the glue
150 The third cell represents the hardware version of the glue layer,
151 1 - used by mt8173 etc, revision 1 without following IPM rule;
152 2 - used by mt2712 etc, revision 2 following IPM rule;
153 101 - used by mt8183, specific 1.01;
154 102 - used by mt8192, specific 1.02;
155 103 - used by mt8195, IP0, specific 1.03;
156 104 - used by mt8195, IP1, specific 1.04;
157 105 - used by mt8195, IP2, specific 1.05;
158 106 - used by mt8195, IP3, specific 1.06;
159 enum: [1, 2, 101, 102, 103, 104, 105, 106]
161 mediatek,u3p-dis-msk:
162 $ref: /schemas/types.yaml#/definitions/uint32
163 description: The mask to disable u3ports, bit0 for u3port0,
164 bit1 for u3port1, ... etc
166 mediatek,u2p-dis-msk:
167 $ref: /schemas/types.yaml#/definitions/uint32
168 description: The mask to disable u2ports, bit0 for u2port0,
169 bit1 for u2port1, ... etc
180 description: The hard wired USB devices.
183 wakeup-source: [ 'mediatek,syscon-wakeup' ]
193 additionalProperties: false
197 #include <dt-bindings/clock/mt8173-clk.h>
198 #include <dt-bindings/interrupt-controller/arm-gic.h>
199 #include <dt-bindings/interrupt-controller/irq.h>
200 #include <dt-bindings/phy/phy.h>
201 #include <dt-bindings/power/mt8173-power.h>
204 compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
205 reg = <0x11270000 0x1000>, <0x11280700 0x0100>;
206 reg-names = "mac", "ippc";
207 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
208 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
209 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
210 clock-names = "sys_ck", "ref_ck";
211 phys = <&u3port0 PHY_TYPE_USB3>, <&u2port1 PHY_TYPE_USB2>;
212 vusb33-supply = <&mt6397_vusb_reg>;
213 vbus-supply = <&usb_p1_vbus>;
214 imod-interval-ns = <10000>;
215 mediatek,syscon-wakeup = <&pericfg 0x400 1>;