3 The device node for Mediatek SOC USB3.0 host controller
5 There are two scenarios: the first one only supports xHCI driver;
6 the second one supports dual-role mode, and the host is based on xHCI
7 driver. Take account of backward compatibility, we divide bindings
10 1st: only supports xHCI driver
11 ------------------------------------------------------------------------
14 - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci",
15 soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
16 "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
18 - "mediatek,mt8173-xhci"
19 - reg : specifies physical base address and size of the registers
20 - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
21 - interrupts : interrupt used by the controller
22 - power-domains : a phandle to USB power domain node to control USB's
24 - vusb33-supply : regulator of USB avdd3.3v
26 - clocks : a list of phandle + clock-specifier pairs, one for each
28 - clock-names : must contain
29 "sys_ck": for clock of xHCI MAC
30 "ref_ck": for reference clock of xHCI MAC
31 "wakeup_deb_p0": for USB wakeup debounce clock of port0
32 "wakeup_deb_p1": for USB wakeup debounce clock of port1
34 - phys : a list of phandle + phy specifier pairs
37 - mediatek,wakeup-src : 1: ip sleep wakeup mode; 2: line state wakeup
39 - mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup
40 control register, it depends on "mediatek,wakeup-src".
41 - vbus-supply : reference to the VBUS regulator;
42 - usb3-lpm-capable : supports USB3.0 LPM
43 - pinctrl-names : a pinctrl state named "default" must be defined
44 - pinctrl-0 : pin control group
45 See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
49 compatible = "mediatek,mt8173-xhci";
50 reg = <0 0x11270000 0 0x1000>,
51 <0 0x11280700 0 0x0100>;
52 reg-names = "mac", "ippc";
53 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
54 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
55 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>,
56 <&pericfg CLK_PERI_USB0>,
57 <&pericfg CLK_PERI_USB1>;
58 clock-names = "sys_ck", "ref_ck",
61 phys = <&phy_port0 PHY_TYPE_USB3>,
62 <&phy_port1 PHY_TYPE_USB2>;
63 vusb33-supply = <&mt6397_vusb_reg>;
64 vbus-supply = <&usb_p1_vbus>;
66 mediatek,syscon-wakeup = <&pericfg>;
67 mediatek,wakeup-src = <1>;
70 2nd: dual-role mode with xHCI driver
71 ------------------------------------------------------------------------
73 In the case, xhci is added as subnode to mtu3. An example and the DT binding
74 details of mtu3 can be found in:
75 Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
78 - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci",
79 soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
80 "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
82 - "mediatek,mt8173-xhci"
83 - reg : specifies physical base address and size of the registers
84 - reg-names: should be "mac" for xHCI MAC
85 - interrupts : interrupt used by the host controller
86 - power-domains : a phandle to USB power domain node to control USB's
88 - vusb33-supply : regulator of USB avdd3.3v
90 - clocks : a list of phandle + clock-specifier pairs, one for each
92 - clock-names : must be
93 "sys_ck": for clock of xHCI MAC
94 "ref_ck": for reference clock of xHCI MAC
97 - vbus-supply : reference to the VBUS regulator;
98 - usb3-lpm-capable : supports USB3.0 LPM
101 usb30: usb@11270000 {
102 compatible = "mediatek,mt8173-xhci";
103 reg = <0 0x11270000 0 0x1000>;
105 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
106 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
107 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
108 clock-names = "sys_ck", "ref_ck";
109 vusb33-supply = <&mt6397_vusb_reg>;