3 The device node for Mediatek SOC USB3.0 host controller
5 There are two scenarios: the first one only supports xHCI driver;
6 the second one supports dual-role mode, and the host is based on xHCI
7 driver. Take account of backward compatibility, we divide bindings
10 1st: only supports xHCI driver
11 ------------------------------------------------------------------------
14 - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci",
15 soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
16 "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
18 - "mediatek,mt8173-xhci"
19 - reg : specifies physical base address and size of the registers
20 - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
21 - interrupts : interrupt used by the controller
22 - power-domains : a phandle to USB power domain node to control USB's
24 - vusb33-supply : regulator of USB avdd3.3v
26 - clocks : a list of phandle + clock-specifier pairs, one for each
28 - clock-names : must contain
29 "sys_ck": controller clock used by normal mode,
30 the following ones are optional:
31 "ref_ck": reference clock used by low power mode etc,
32 "mcu_ck": mcu_bus clock for register access,
33 "dma_ck": dma_bus clock for data transfer by DMA
35 - phys : see usb-hcd.txt in the current directory
38 - wakeup-source : enable USB remote wakeup;
39 - mediatek,syscon-wakeup : phandle to syscon used to access the register
40 of the USB wakeup glue layer between xHCI and SPM; it depends on
41 "wakeup-source", and has two arguments:
42 - the first one : register base address of the glue layer in syscon;
43 - the second one : hardware version of the glue layer
44 - 1 : used by mt8173 etc
45 - 2 : used by mt2712 etc
46 - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
47 bit1 for u3port1, ... etc;
48 - vbus-supply : reference to the VBUS regulator;
49 - usb3-lpm-capable : supports USB3.0 LPM
50 - pinctrl-names : a pinctrl state named "default" must be defined
51 - pinctrl-0 : pin control group
52 See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
53 - imod-interval-ns: default interrupt moderation interval is 5000ns
55 additionally the properties from usb-hcd.txt (in the current directory) are
60 compatible = "mediatek,mt8173-xhci";
61 reg = <0 0x11270000 0 0x1000>,
62 <0 0x11280700 0 0x0100>;
63 reg-names = "mac", "ippc";
64 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
65 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
66 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>,
67 <&pericfg CLK_PERI_USB0>,
68 <&pericfg CLK_PERI_USB1>;
69 clock-names = "sys_ck", "ref_ck";
70 phys = <&phy_port0 PHY_TYPE_USB3>,
71 <&phy_port1 PHY_TYPE_USB2>;
72 vusb33-supply = <&mt6397_vusb_reg>;
73 vbus-supply = <&usb_p1_vbus>;
75 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
77 imod-interval-ns = <10000>;
80 2nd: dual-role mode with xHCI driver
81 ------------------------------------------------------------------------
83 In the case, xhci is added as subnode to mtu3. An example and the DT binding
84 details of mtu3 can be found in:
85 Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
88 - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci",
89 soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
90 "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
92 - "mediatek,mt8173-xhci"
93 - reg : specifies physical base address and size of the registers
94 - reg-names: should be "mac" for xHCI MAC
95 - interrupts : interrupt used by the host controller
96 - power-domains : a phandle to USB power domain node to control USB's
98 - vusb33-supply : regulator of USB avdd3.3v
100 - clocks : a list of phandle + clock-specifier pairs, one for each
102 - clock-names : must contain "sys_ck", and the following ones are optional:
103 "ref_ck", "mcu_ck" and "dma_ck"
106 - vbus-supply : reference to the VBUS regulator;
107 - usb3-lpm-capable : supports USB3.0 LPM
110 usb30: usb@11270000 {
111 compatible = "mediatek,mt8173-xhci";
112 reg = <0 0x11270000 0 0x1000>;
114 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
115 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
116 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
117 clock-names = "sys_ck", "ref_ck";
118 vusb33-supply = <&mt6397_vusb_reg>;