1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2020 NXP
5 $id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: NXP iMX8MP Soc USB Controller
11 - Li Jun <jun.li@nxp.com>
15 const: fsl,imx8mp-dwc3
19 description: Address and length of the register set for the wrapper of
30 See section 2.3.9 of the DeviceTree Specification.
36 description: The interrupt that is asserted when a wakeup event is
41 A list of phandle and clock-specifier pairs for the clocks
42 listed in clock-names.
44 - description: system hsio root clock.
45 - description: suspend clock, used for usb wakeup logic.
52 # Required child node:
69 additionalProperties: false
73 #include <dt-bindings/clock/imx8mp-clock.h>
74 #include <dt-bindings/interrupt-controller/arm-gic.h>
75 usb3_0: usb@32f10100 {
76 compatible = "fsl,imx8mp-dwc3";
77 reg = <0x32f10100 0x8>;
78 clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
79 <&clk IMX8MP_CLK_USB_ROOT>;
80 clock-names = "hsio", "suspend";
81 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
84 dma-ranges = <0x40000000 0x40000000 0xc0000000>;
88 compatible = "snps,dwc3";
89 reg = <0x38100000 0x10000>;
90 clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
91 <&clk IMX8MP_CLK_USB_CORE_REF>,
92 <&clk IMX8MP_CLK_USB_ROOT>;
93 clock-names = "bus_early", "ref", "suspend";
94 assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
95 assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
96 assigned-clock-rates = <500000000>;
97 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
98 phys = <&usb3_phy0>, <&usb3_phy0>;
99 phy-names = "usb2-phy", "usb3-phy";
100 snps,dis-u2-freeclk-exists-quirk;