1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/ufs/samsung,exynos-ufs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung SoC series UFS host controller Device Tree Bindings
10 - Alim Akhtar <alim.akhtar@samsung.com>
13 Each Samsung UFS host controller instance should have its own node.
16 - $ref: ufs-common.yaml
22 - samsung,exynosautov9-ufs
23 - samsung,exynosautov9-ufs-vh
27 - description: HCI register
28 - description: vendor specific register
29 - description: unipro register
30 - description: UFS protector register
41 - description: ufs link core clock
42 - description: unipro main clock
47 - const: sclk_unipro_main
56 $ref: '/schemas/types.yaml#/definitions/phandle-array'
57 description: Should be phandle/offset pair. The phandle to the syscon node
58 which indicates the FSYSx sysreg interface and the offset of
59 the control register for UFS io coherency setting.
71 unevaluatedProperties: false
75 #include <dt-bindings/interrupt-controller/arm-gic.h>
76 #include <dt-bindings/clock/exynos7-clk.h>
79 compatible = "samsung,exynos7-ufs";
80 reg = <0x15570000 0x100>,
84 reg-names = "hci", "vs_hci", "unipro", "ufsp";
85 interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
86 clocks = <&clock_fsys1 ACLK_UFS20_LINK>,
87 <&clock_fsys1 SCLK_UFSUNIPRO20_USER>;
88 clock-names = "core_clk", "sclk_unipro_main";
89 pinctrl-names = "default";
90 pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
92 phy-names = "ufs-phy";