1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC Multi Core Timer (MCT)
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
14 global timer and CPU local timers. The global timer is a 64-bit free running
15 up-counter and can generate 4 interrupts when the counter reaches one of the
16 four preset counter values. The CPU local timers are 32-bit free running
17 down-counters and generate an interrupt when the counter expires. There is
18 one CPU local timer instantiated in MCT for every CPU in the system.
24 - samsung,exynos4210-mct
25 - samsung,exynos4412-mct
29 - samsung,exynos3250-mct
30 - samsung,exynos5250-mct
31 - samsung,exynos5260-mct
32 - samsung,exynos5420-mct
33 - samsung,exynos5433-mct
34 - samsung,exynos850-mct
36 - const: samsung,exynos4210-mct
52 Indicates that the hardware requires that this processor share the
53 free-running counter with a different (main) processor.
56 $ref: /schemas/types.yaml#/definitions/uint32-array
60 List of indices of local timers usable from this processor.
64 Interrupts should be put in specific order. This is, the local timer
65 interrupts should be specified after the four global timer interrupts
67 0: Global Timer Interrupt 0
68 1: Global Timer Interrupt 1
69 2: Global Timer Interrupt 2
70 3: Global Timer Interrupt 3
71 4: Local Timer Interrupt 0
72 5: Local Timer Interrupt 1
75 i: Local Timer Interrupt n
76 For MCT block that uses a per-processor interrupt for local timers, such
77 as ones compatible with "samsung,exynos4412-mct", only one local timer
78 interrupt might be specified, meaning that all local timers use the same
79 per processor interrupt.
80 minItems: 5 # 4 Global + 1 local
81 maxItems: 20 # 4 Global + 16 local
100 samsung,local-timers: false
101 samsung,frc-shared: false
106 const: samsung,exynos3250-mct
117 const: samsung,exynos5250-mct
130 - samsung,exynos5260-mct
131 - samsung,exynos5420-mct
132 - samsung,exynos5433-mct
133 - samsung,exynos850-mct
152 additionalProperties: false
156 // In this example, the IP contains two local timers, using separate
157 // interrupts, so two local timer interrupts have been specified,
158 // in addition to four global timer interrupts.
159 #include <dt-bindings/clock/exynos4.h>
160 #include <dt-bindings/interrupt-controller/arm-gic.h>
163 compatible = "samsung,exynos4210-mct";
164 reg = <0x10050000 0x800>;
165 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
166 clock-names = "fin_pll", "mct";
168 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
169 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
170 <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
171 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
172 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
173 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
177 // In this example, the timer interrupts are connected to two separate
178 // interrupt controllers. Hence, an interrupts-extended is needed.
179 #include <dt-bindings/clock/exynos4.h>
180 #include <dt-bindings/interrupt-controller/arm-gic.h>
183 compatible = "samsung,exynos4210-mct";
184 reg = <0x101C0000 0x800>;
185 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
186 clock-names = "fin_pll", "mct";
188 interrupts-extended = <&gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
189 <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
192 <&gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
193 <&gic GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
197 // In this example, the IP contains four local timers, but using
198 // a per-processor interrupt to handle them. Only one first local
199 // interrupt is specified.
200 #include <dt-bindings/clock/exynos4.h>
201 #include <dt-bindings/interrupt-controller/arm-gic.h>
204 compatible = "samsung,exynos4412-mct";
205 reg = <0x10050000 0x800>;
206 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
207 clock-names = "fin_pll", "mct";
209 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
210 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
211 <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
212 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
213 <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>;
217 // In this example, the IP contains four local timers, but using
218 // a per-processor interrupt to handle them. All the local timer
219 // interrupts are specified.
220 #include <dt-bindings/clock/exynos4.h>
221 #include <dt-bindings/interrupt-controller/arm-gic.h>
224 compatible = "samsung,exynos4412-mct";
225 reg = <0x10050000 0x800>;
226 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
227 clock-names = "fin_pll", "mct";
229 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
230 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
231 <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
232 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
233 <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>,
234 <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>,
235 <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>,
236 <GIC_PPI 42 IRQ_TYPE_LEVEL_HIGH>;