1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/timer/renesas,ostm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas OS Timer (OSTM)
10 - Chris Brandt <chris.brandt@renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
14 The OSTM is a multi-channel 32-bit timer/counter with fixed clock source that
15 can operate in either interval count down timer or free-running compare match
18 Channels are independent from each other.
24 - renesas,r7s72100-ostm # RZ/A1H
25 - renesas,r7s9210-ostm # RZ/A2M
26 - renesas,r9a07g043-ostm # RZ/G2UL
27 - renesas,r9a07g044-ostm # RZ/G2{L,LC}
28 - renesas,r9a07g054-ostm # RZ/V2L
29 - const: renesas,ostm # Generic
58 - renesas,r9a07g043-ostm
59 - renesas,r9a07g044-ostm
60 - renesas,r9a07g054-ostm
65 additionalProperties: false
69 #include <dt-bindings/clock/r7s72100-clock.h>
70 #include <dt-bindings/interrupt-controller/arm-gic.h>
71 ostm0: timer@fcfec000 {
72 compatible = "renesas,r7s72100-ostm", "renesas,ostm";
73 reg = <0xfcfec000 0x30>;
74 interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>;
75 clocks = <&mstp5_clks R7S72100_CLK_OSTM0>;
76 power-domains = <&cpg_clocks>;