1 Cadence TTC - Triple Timer Counter
4 - compatible : Should be "cdns,ttc".
5 - reg : Specifies base physical address and size of the registers.
6 - interrupts : A list of 3 interrupts; one per timer channel.
7 - clocks: phandle to the source clock
10 - timer-width: Bit width of the timer, necessary if not 16.
15 interrupt-parent = <&intc>;
16 interrupts = < 0 10 4 0 11 4 0 12 4 >;
17 compatible = "cdns,ttc";
18 reg = <0xF8001000 0x1000>;
19 clocks = <&cpu_clk 3>;