1 # SPDX-License-Identifier: GPL-2.0-only
4 $id: http://devicetree.org/schemas/spmi/qcom,spmi-pmic-arb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SPMI Controller (PMIC Arbiter)
10 - Stephen Boyd <sboyd@kernel.org>
13 The SPMI PMIC Arbiter is found on Snapdragon chipsets. It is an SPMI
14 controller with wrapping arbitration logic to allow for multiple on-chip
15 devices to control a single SPMI master.
17 The PMIC Arbiter can also act as an interrupt controller, providing interrupts
25 const: qcom,spmi-pmic-arb
30 - description: core registers
31 - description: interrupt controller registers
32 - description: configuration registers
34 - description: core registers
35 - description: tx-channel per virtual slave regosters
36 - description: rx-channel (called observer) per virtual slave registers
37 - description: interrupt controller registers
38 - description: configuration registers
59 interrupt-controller: true
61 '#address-cells': true
66 cell 1: slave ID for the requested interrupt (0-15)
67 cell 2: peripheral ID for requested interrupt (0-255)
68 cell 3: the requested peripheral interrupt (0-7)
69 cell 4: interrupt flags indicating level-sense information,
70 as defined in dt-bindings/interrupt-controller/irq.h
75 $ref: /schemas/types.yaml#/definitions/uint32
79 indicates the active Execution Environment identifier
82 $ref: /schemas/types.yaml#/definitions/uint32
86 which of the PMIC Arb provided channels to use for accesses
94 unevaluatedProperties: false
99 compatible = "qcom,spmi-pmic-arb";
100 reg-names = "core", "intr", "cnfg";
101 reg = <0xfc4cf000 0x1000>,
105 interrupt-names = "periph_irq";
106 interrupts = <0 190 0>;
111 #address-cells = <2>;
114 interrupt-controller;
115 #interrupt-cells = <4>;