1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek SPMI Controller
10 - Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
13 On MediaTek SoCs the PMIC is connected via SPMI and the controller allows
14 for multiple SoCs to control a single SPMI master.
22 - mediatek,mt6873-spmi
23 - mediatek,mt8195-spmi
41 - const: spmimst_clk_mux
46 assigned-clock-parents:
56 unevaluatedProperties: false
60 #include <dt-bindings/clock/mt8192-clk.h>
63 compatible = "mediatek,mt6873-spmi";
64 reg = <0x10027000 0xe00>,
66 reg-names = "pmif", "spmimst";
67 clocks = <&infracfg CLK_INFRA_PMIC_AP>,
68 <&infracfg CLK_INFRA_PMIC_TMR>,
69 <&topckgen CLK_TOP_SPMI_MST_SEL>;
70 clock-names = "pmif_sys_ck",
73 assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>;
74 assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>;