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[releases.git] / Documentation / devicetree / bindings / spmi / mtk,spmi-mtk-pmif.yaml
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Mediatek SPMI Controller
8
9 maintainers:
10   - Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
11
12 description: |+
13   On MediaTek SoCs the PMIC is connected via SPMI and the controller allows
14   for multiple SoCs to control a single SPMI master.
15
16 allOf:
17   - $ref: "spmi.yaml"
18
19 properties:
20   compatible:
21     enum:
22       - mediatek,mt6873-spmi
23       - mediatek,mt8195-spmi
24
25   reg:
26     maxItems: 2
27
28   reg-names:
29     items:
30       - const: pmif
31       - const: spmimst
32
33   clocks:
34     minItems: 3
35     maxItems: 3
36
37   clock-names:
38     items:
39       - const: pmif_sys_ck
40       - const: pmif_tmr_ck
41       - const: spmimst_clk_mux
42
43   assigned-clocks:
44     maxItems: 1
45
46   assigned-clock-parents:
47     maxItems: 1
48
49 required:
50   - compatible
51   - reg
52   - reg-names
53   - clocks
54   - clock-names
55
56 unevaluatedProperties: false
57
58 examples:
59   - |
60     #include <dt-bindings/clock/mt8192-clk.h>
61
62     spmi: spmi@10027000 {
63         compatible = "mediatek,mt6873-spmi";
64         reg = <0x10027000 0xe00>,
65               <0x10029000 0x100>;
66         reg-names = "pmif", "spmimst";
67         clocks = <&infracfg CLK_INFRA_PMIC_AP>,
68                  <&infracfg CLK_INFRA_PMIC_TMR>,
69                  <&topckgen CLK_TOP_SPMI_MST_SEL>;
70         clock-names = "pmif_sys_ck",
71                       "pmif_tmr_ck",
72                       "spmimst_clk_mux";
73         assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>;
74         assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>;
75     };
76 ...