Documentation/devicetree/bindings/spi/spi-sun6i.txt

   1 Allwinner A31/H3 SPI controller
   2
   3 Required properties:
   4 - compatible: Should be "allwinner,sun6i-a31-spi" or "allwinner,sun8i-h3-spi".
   5 - reg: Should contain register location and length.
   6 - interrupts: Should contain interrupt.
   7 - clocks: phandle to the clocks feeding the SPI controller. Two are
   8           needed:
   9   - "ahb": the gated AHB parent clock
  10   - "mod": the parent module clock
  11 - clock-names: Must contain the clock names described just above
  12 - resets: phandle to the reset controller asserting this device in
  13           reset
  14
  15 Optional properties:
  16 - dmas: DMA specifiers for rx and tx dma. See the DMA client binding,
  17         Documentation/devicetree/bindings/dma/dma.txt
  18 - dma-names: DMA request names should include "rx" and "tx" if present.
  19
  20 Example:
  21
  22 spi1: spi@01c69000 {
  23         compatible = "allwinner,sun6i-a31-spi";
  24         reg = <0x01c69000 0x1000>;
  25         interrupts = <0 66 4>;
  26         clocks = <&ahb1_gates 21>, <&spi1_clk>;
  27         clock-names = "ahb", "mod";
  28         resets = <&ahb1_rst 21>;
  29 };
  30
  31 spi0: spi@01c68000 {
  32         compatible = "allwinner,sun8i-h3-spi";
  33         reg = <0x01c68000 0x1000>;
  34         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
  35         clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
  36         clock-names = "ahb", "mod";
  37         dmas = <&dma 23>, <&dma 23>;
  38         dma-names = "rx", "tx";
  39         pinctrl-names = "default";
  40         pinctrl-0 = <&spi0_pins>;
  41         resets = <&ccu RST_BUS_SPI0>;
  42         #address-cells = <1>;
  43         #size-cells = <0>;
  44 };