1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/spi/samsung,spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC SPI controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 All the SPI controller nodes should be represented in the aliases node using
14 the following format 'spi{n}' where n is a unique number for the alias.
20 - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450
22 - samsung,s5pv210-spi # for S5PV210 and S5PC110
23 - samsung,exynos4210-spi
24 - samsung,exynos5433-spi
25 - samsung,exynosautov9-spi
27 - const: samsung,exynos7-spi
54 The CS line is disconnected, therefore the device should not operate
55 based on CS signalling.
65 If the spi controller includes a internal clock mux to select the clock
66 source for the spi bus clock, this property can be used to indicate the
67 clock to be used for driving the spi bus clock. If not specified, the
68 clock number 0 is used as default.
69 $ref: /schemas/types.yaml#/definitions/uint32
85 - $ref: spi-controller.yaml#
91 - samsung,exynos5433-spi
92 - samsung,exynosautov9-spi
121 unevaluatedProperties: false
125 #include <dt-bindings/clock/exynos5433.h>
126 #include <dt-bindings/clock/samsung,s2mps11.h>
127 #include <dt-bindings/interrupt-controller/arm-gic.h>
128 #include <dt-bindings/gpio/gpio.h>
131 compatible = "samsung,exynos5433-spi";
132 reg = <0x14d30000 0x100>;
133 interrupts = <GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH>;
134 dmas = <&pdma0 11>, <&pdma0 10>;
135 dma-names = "tx", "rx";
136 #address-cells = <1>;
138 clocks = <&cmu_peric CLK_PCLK_SPI1>,
139 <&cmu_peric CLK_SCLK_SPI1>,
140 <&cmu_peric CLK_SCLK_IOCLK_SPI1>;
144 samsung,spi-src-clk = <0>;
145 pinctrl-names = "default";
146 pinctrl-0 = <&spi1_bus>;
149 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
152 compatible = "wlf,wm5110";
154 spi-max-frequency = <20000000>;
155 interrupt-parent = <&gpa0>;
156 interrupts = <4 IRQ_TYPE_NONE>;
157 clocks = <&pmu_system_controller 0>,
158 <&s2mps13_osc S2MPS11_CLK_BT>;
159 clock-names = "mclk1", "mclk2";
163 interrupt-controller;
164 #interrupt-cells = <2>;
166 wlf,micd-detect-debounce = <300>;
167 wlf,micd-bias-start-time = <0x1>;
168 wlf,micd-rate = <0x7>;
169 wlf,micd-dbtime = <0x2>;
170 wlf,micd-force-micbias;
171 wlf,micd-configs = <0x0 1 0>;
172 wlf,hpdet-channel = <1>;
174 wlf,inmode = <2 0 2 0>;
176 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
177 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
180 AVDD-supply = <&ldo18_reg>;
181 DBVDD1-supply = <&ldo18_reg>;
182 CPVDD-supply = <&ldo18_reg>;
183 DBVDD2-supply = <&ldo18_reg>;
184 DBVDD3-supply = <&ldo18_reg>;
185 SPKVDDL-supply = <&ldo18_reg>;
186 SPKVDDR-supply = <&ldo18_reg>;
189 samsung,spi-feedback-delay = <0>;