Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Renesas MSIOF SPI controller
   8
   9 maintainers:
  10   - Geert Uytterhoeven <geert+renesas@glider.be>
  11
  12 allOf:
  13   - $ref: spi-controller.yaml#
  14
  15 properties:
  16   compatible:
  17     oneOf:
  18       - items:
  19           - const: renesas,msiof-sh73a0     # SH-Mobile AG5
  20           - const: renesas,sh-mobile-msiof  # generic SH-Mobile compatible
  21                                             # device
  22       - items:
  23           - enum:
  24               - renesas,msiof-r8a7742       # RZ/G1H
  25               - renesas,msiof-r8a7743       # RZ/G1M
  26               - renesas,msiof-r8a7744       # RZ/G1N
  27               - renesas,msiof-r8a7745       # RZ/G1E
  28               - renesas,msiof-r8a77470      # RZ/G1C
  29               - renesas,msiof-r8a7790       # R-Car H2
  30               - renesas,msiof-r8a7791       # R-Car M2-W
  31               - renesas,msiof-r8a7792       # R-Car V2H
  32               - renesas,msiof-r8a7793       # R-Car M2-N
  33               - renesas,msiof-r8a7794       # R-Car E2
  34           - const: renesas,rcar-gen2-msiof  # generic R-Car Gen2 and RZ/G1
  35                                             # compatible device
  36       - items:
  37           - enum:
  38               - renesas,msiof-r8a774a1      # RZ/G2M
  39               - renesas,msiof-r8a774b1      # RZ/G2N
  40               - renesas,msiof-r8a774c0      # RZ/G2E
  41               - renesas,msiof-r8a774e1      # RZ/G2H
  42               - renesas,msiof-r8a7795       # R-Car H3
  43               - renesas,msiof-r8a7796       # R-Car M3-W
  44               - renesas,msiof-r8a77961      # R-Car M3-W+
  45               - renesas,msiof-r8a77965      # R-Car M3-N
  46               - renesas,msiof-r8a77970      # R-Car V3M
  47               - renesas,msiof-r8a77980      # R-Car V3H
  48               - renesas,msiof-r8a77990      # R-Car E3
  49               - renesas,msiof-r8a77995      # R-Car D3
  50           - const: renesas,rcar-gen3-msiof  # generic R-Car Gen3 and RZ/G2
  51                                             # compatible device
  52       - items:
  53           - enum:
  54               - renesas,msiof-r8a779a0      # R-Car V3U
  55               - renesas,msiof-r8a779f0      # R-Car S4-8
  56               - renesas,msiof-r8a779g0      # R-Car V4H
  57           - const: renesas,rcar-gen4-msiof  # generic R-Car Gen4
  58                                             # compatible device
  59       - items:
  60           - const: renesas,sh-msiof  # deprecated
  61
  62   reg:
  63     minItems: 1
  64     maxItems: 2
  65     oneOf:
  66       - items:
  67           - description: CPU and DMA engine registers
  68       - items:
  69           - description: CPU registers
  70           - description: DMA engine registers
  71
  72   interrupts:
  73     maxItems: 1
  74
  75   clocks:
  76     maxItems: 1
  77
  78   power-domains:
  79     maxItems: 1
  80
  81   resets:
  82     maxItems: 1
  83
  84   num-cs:
  85     description: |
  86       Total number of chip selects (default is 1).
  87       Up to 3 native chip selects are supported:
  88         0: MSIOF_SYNC
  89         1: MSIOF_SS1
  90         2: MSIOF_SS2
  91       Hardware limitations related to chip selects:
  92         - Native chip selects are always deasserted in between transfers
  93           that are part of the same message.  Use cs-gpios to work around
  94           this.
  95         - All slaves using native chip selects must use the same spi-cs-high
  96           configuration.  Use cs-gpios to work around this.
  97         - When using GPIO chip selects, at least one native chip select must
  98           be left unused, as it will be driven anyway.
  99     minimum: 1
 100     maximum: 3
 101     default: 1
 102
 103   dmas:
 104     minItems: 2
 105     maxItems: 4
 106
 107   dma-names:
 108     minItems: 2
 109     maxItems: 4
 110     items:
 111       enum: [ tx, rx ]
 112
 113   renesas,dtdl:
 114     description: delay sync signal (setup) in transmit mode.
 115     $ref: /schemas/types.yaml#/definitions/uint32
 116     enum:
 117       - 0        # no bit delay
 118       - 50       # 0.5-clock-cycle delay
 119       - 100      # 1-clock-cycle delay
 120       - 150      # 1.5-clock-cycle delay
 121       - 200      # 2-clock-cycle delay
 122
 123   renesas,syncdl:
 124     description: delay sync signal (hold) in transmit mode
 125     $ref: /schemas/types.yaml#/definitions/uint32
 126     enum:
 127       - 0        # no bit delay
 128       - 50       # 0.5-clock-cycle delay
 129       - 100      # 1-clock-cycle delay
 130       - 150      # 1.5-clock-cycle delay
 131       - 200      # 2-clock-cycle delay
 132       - 300      # 3-clock-cycle delay
 133
 134   renesas,tx-fifo-size:
 135     # deprecated for soctype-specific bindings
 136     description: |
 137       Override the default TX fifo size.  Unit is words.  Ignored if 0.
 138     $ref: /schemas/types.yaml#/definitions/uint32
 139     default: 64
 140
 141   renesas,rx-fifo-size:
 142     # deprecated for soctype-specific bindings
 143     description: |
 144       Override the default RX fifo size.  Unit is words.  Ignored if 0.
 145     $ref: /schemas/types.yaml#/definitions/uint32
 146     default: 64
 147
 148 required:
 149   - compatible
 150   - reg
 151   - interrupts
 152   - '#address-cells'
 153   - '#size-cells'
 154
 155 unevaluatedProperties: false
 156
 157 examples:
 158   - |
 159     #include <dt-bindings/clock/r8a7791-clock.h>
 160     #include <dt-bindings/interrupt-controller/irq.h>
 161
 162     msiof0: spi@e6e20000 {
 163         compatible = "renesas,msiof-r8a7791", "renesas,rcar-gen2-msiof";
 164         reg = <0xe6e20000 0x0064>;
 165         interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
 166         clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
 167         dmas = <&dmac0 0x51>, <&dmac0 0x52>;
 168         dma-names = "tx", "rx";
 169         #address-cells = <1>;
 170         #size-cells = <0>;
 171     };