1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/spi/omap-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI controller bindings for OMAP and K3 SoCs
10 - Aswath Govindraju <a-govindraju@ti.com>
13 - $ref: spi-controller.yaml#
22 - const: ti,omap4-mcspi
41 $ref: /schemas/types.yaml#/definitions/uint32
42 description: Number of chipselect supported by the instance.
47 $ref: /schemas/types.yaml#/definitions/string
49 Must be "mcspi<n>", n being the instance number (1-based).
50 This property is applicable only on legacy platforms mainly omap2/3
51 and ti81xx and should not be used on other platforms.
54 ti,pindir-d0-out-d1-in:
56 Select the D0 pin as output and D1 as input. The default is D0
57 as input and D1 as output.
62 List of DMA specifiers with the controller specific format as
63 described in the generic DMA client binding. A tx and rx
64 specifier is required for each chip select.
70 List of DMA request names. These strings correspond 1:1 with
71 the DMA sepecifiers listed in dmas. The string names is to be
72 "rxN" and "txN" for RX and TX requests, respectively. Where N
73 is the chip select number.
82 unevaluatedProperties: false
95 - pattern: "^mcspi([1-9])$"
103 #include <dt-bindings/interrupt-controller/irq.h>
104 #include <dt-bindings/interrupt-controller/arm-gic.h>
105 #include <dt-bindings/soc/ti,sci_pm_domain.h>
108 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
109 reg = <0x2100000 0x400>;
110 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
111 clocks = <&k3_clks 137 1>;
112 power-domains = <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
113 #address-cells = <1>;
115 dmas = <&main_udmap 0xc500>, <&main_udmap 0x4500>;
116 dma-names = "tx0", "rx0";