Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 # Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
   3 %YAML 1.2
   4 ---
   5 $id: http://devicetree.org/schemas/spi/atmel,at91rm9200-spi.yaml#
   6 $schema: http://devicetree.org/meta-schemas/core.yaml#
   7
   8 title: Atmel SPI device
   9
  10 maintainers:
  11   - Tudor Ambarus <tudor.ambarus@microchip.com>
  12
  13 allOf:
  14   - $ref: spi-controller.yaml#
  15
  16 properties:
  17   compatible:
  18     oneOf:
  19       - const: atmel,at91rm9200-spi
  20       - items:
  21           - const: microchip,sam9x60-spi
  22           - const: atmel,at91rm9200-spi
  23
  24   reg:
  25     maxItems: 1
  26
  27   interrupts:
  28     maxItems: 1
  29
  30   clock-names:
  31     contains:
  32       const: spi_clk
  33
  34   clocks:
  35     maxItems: 1
  36
  37   dmas:
  38     items:
  39       - description: TX DMA Channel
  40       - description: RX DMA Channel
  41
  42   dma-names:
  43     items:
  44       - const: tx
  45       - const: rx
  46
  47   atmel,fifo-size:
  48     $ref: /schemas/types.yaml#/definitions/uint32
  49     description: |
  50       Maximum number of data the RX and TX FIFOs can store for FIFO
  51       capable SPI controllers.
  52     enum: [ 16, 32 ]
  53
  54 required:
  55   - compatible
  56   - reg
  57   - interrupts
  58   - clock-names
  59   - clocks
  60
  61 unevaluatedProperties: false
  62
  63 examples:
  64   - |
  65     #include <dt-bindings/gpio/gpio.h>
  66     #include <dt-bindings/interrupt-controller/irq.h>
  67
  68     spi1: spi@fffcc000 {
  69         compatible = "atmel,at91rm9200-spi";
  70         reg = <0xfffcc000 0x4000>;
  71         interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
  72         #address-cells = <1>;
  73         #size-cells = <0>;
  74         clocks = <&spi1_clk>;
  75         clock-names = "spi_clk";
  76         cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>;
  77         atmel,fifo-size = <32>;
  78
  79         mmc@0 {
  80             compatible = "mmc-spi-slot";
  81             reg = <0>;
  82             gpios = <&pioC 4 GPIO_ACTIVE_HIGH>;    /* CD */
  83             spi-max-frequency = <25000000>;
  84         };
  85     };