1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/sound/st,stm32-sai.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Serial Audio Interface (SAI)
10 - Olivier Moysan <olivier.moysan@st.com>
13 The SAI interface (Serial Audio Interface) offers a wide set of audio
14 protocols as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97.
15 The SAI contains two independent audio sub-blocks. Each sub-block has
16 its own clock generator and I/O lines controller.
26 - description: Base address and size of SAI common register set.
27 - description: Base address and size of SAI identification register set.
61 "^audio-controller@[0-9a-f]+$":
64 Two subnodes corresponding to SAI sub-block instances A et B
65 can be defined. Subnode can be omitted for unsused sub-block.
69 description: Compatible for SAI sub-block A or B.
70 pattern: "st,stm32-sai-sub-[ab]"
80 - description: sai_ck clock feeding the internal clock generator.
81 - description: MCLK clock from a SAI set as master clock provider.
95 rx: SAI sub-block is configured as a capture DAI.
96 tx: SAI sub-block is configured as a playback DAI.
101 Configure the SAI sub-block as slave of another SAI sub-block.
102 By default SAI sub-block is in asynchronous mode.
103 Must contain the phandle and index of the SAI sub-block providing
106 - $ref: /schemas/types.yaml#/definitions/phandle-array
111 If set, support S/PDIF IEC6958 protocol for playback.
112 IEC60958 protocol is not available for capture.
113 By default, custom protocol is assumed, meaning that protocol is
114 configured according to protocol defined in related DAI link node,
115 such as i2s, left justified, right justified, dsp and pdm protocols.
117 - $ref: /schemas/types.yaml#/definitions/flag
120 description: Configure the SAI device as master clock provider.
137 const: st,stm32f4-sai
143 - description: x8k, SAI parent clock for sampling rates multiple of 8kHz.
144 - description: x11k, SAI parent clock for sampling rates multiple of 11.025kHz.
155 - description: pclk feeds the peripheral bus interface.
156 - description: x8k, SAI parent clock for sampling rates multiple of 8kHz.
157 - description: x11k, SAI parent clock for sampling rates multiple of 11.025kHz.
165 additionalProperties: false
169 #include <dt-bindings/interrupt-controller/arm-gic.h>
170 #include <dt-bindings/clock/stm32mp1-clks.h>
171 #include <dt-bindings/reset/stm32mp1-resets.h>
173 compatible = "st,stm32h7-sai";
174 #address-cells = <1>;
176 ranges = <0 0x4400b000 0x400>;
177 reg = <0x4400b000 0x4>, <0x4400b3f0 0x10>;
178 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
179 clock-names = "pclk", "x8k", "x11k";
180 pinctrl-names = "default", "sleep";
181 pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
182 pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>;
184 sai2a: audio-controller@4400b004 {
185 #sound-dai-cells = <0>;
186 compatible = "st,stm32-sai-sub-a";
188 dmas = <&dmamux1 89 0x400 0x01>;
190 clocks = <&rcc SAI2_K>;
191 clock-names = "sai_ck";