Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Rockchip I2S/TDM Controller
   8
   9 description:
  10   The Rockchip I2S/TDM Controller is a Time Division Multiplexed
  11   audio interface found in various Rockchip SoCs, allowing up
  12   to 8 channels of audio over a serial interface.
  13
  14 maintainers:
  15   - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
  16
  17 properties:
  18   compatible:
  19     enum:
  20       - rockchip,px30-i2s-tdm
  21       - rockchip,rk1808-i2s-tdm
  22       - rockchip,rk3308-i2s-tdm
  23       - rockchip,rk3568-i2s-tdm
  24       - rockchip,rv1126-i2s-tdm
  25
  26   reg:
  27     maxItems: 1
  28
  29   interrupts:
  30     maxItems: 1
  31
  32   dmas:
  33     minItems: 1
  34     maxItems: 2
  35
  36   dma-names:
  37     minItems: 1
  38     maxItems: 2
  39     items:
  40       enum:
  41         - rx
  42         - tx
  43
  44   clocks:
  45     minItems: 3
  46     items:
  47       - description: clock for TX
  48       - description: clock for RX
  49       - description: AHB clock driving the interface
  50       - description:
  51           Parent clock for mclk_tx (only required when using mclk-calibrate)
  52       - description:
  53           Parent clock for mclk_rx (only required when using mclk-calibrate)
  54       - description:
  55           Clock for sample rates that are an integer multiple of 8000
  56           (only required when using mclk-calibrate)
  57       - description:
  58           Clock for sample rates that are an integer multiple of 11025
  59           (only required when using mclk-calibrate)
  60
  61   clock-names:
  62     minItems: 3
  63     items:
  64       - const: mclk_tx
  65       - const: mclk_rx
  66       - const: hclk
  67       - const: mclk_tx_src
  68       - const: mclk_rx_src
  69       - const: mclk_root0
  70       - const: mclk_root1
  71
  72   resets:
  73     minItems: 1
  74     maxItems: 2
  75     description: resets for the tx and rx directions
  76
  77   reset-names:
  78     minItems: 1
  79     maxItems: 2
  80     items:
  81       enum:
  82         - tx-m
  83         - rx-m
  84
  85   rockchip,grf:
  86     $ref: /schemas/types.yaml#/definitions/phandle
  87     description:
  88       The phandle of the syscon node for the GRF register.
  89
  90   rockchip,trcm-sync-tx-only:
  91     type: boolean
  92     description: Use TX BCLK/LRCK for both TX and RX.
  93
  94   rockchip,trcm-sync-rx-only:
  95     type: boolean
  96     description: Use RX BCLK/LRCK for both TX and RX.
  97
  98   "#sound-dai-cells":
  99     const: 0
 100
 101   rockchip,i2s-rx-route:
 102     $ref: /schemas/types.yaml#/definitions/uint32-array
 103     description:
 104       Defines the mapping of I2S RX sdis to I2S data bus lines.
 105       By default, they are mapped one-to-one.
 106       rockchip,i2s-rx-route = <3> would mean sdi3 is receiving from data0.
 107     maxItems: 4
 108     items:
 109       enum: [0, 1, 2, 3]
 110
 111   rockchip,i2s-tx-route:
 112     $ref: /schemas/types.yaml#/definitions/uint32-array
 113     description:
 114       Defines the mapping of I2S TX sdos to I2S data bus lines.
 115       By default, they are mapped one-to-one.
 116       rockchip,i2s-tx-route = <3> would mean sdo3 is sending to data0.
 117     maxItems: 4
 118     items:
 119       enum: [0, 1, 2, 3]
 120
 121   rockchip,io-multiplex:
 122     description:
 123       Specify that the GPIO lines on the I2S bus are multiplexed such that
 124       the direction (input/output) needs to be dynamically adjusted.
 125     type: boolean
 126
 127
 128 required:
 129   - compatible
 130   - reg
 131   - interrupts
 132   - dmas
 133   - dma-names
 134   - clocks
 135   - clock-names
 136   - resets
 137   - reset-names
 138   - rockchip,grf
 139   - "#sound-dai-cells"
 140
 141 additionalProperties: false
 142
 143 examples:
 144   - |
 145     #include <dt-bindings/clock/rk3568-cru.h>
 146     #include <dt-bindings/interrupt-controller/arm-gic.h>
 147     #include <dt-bindings/interrupt-controller/irq.h>
 148     #include <dt-bindings/pinctrl/rockchip.h>
 149
 150     bus {
 151         #address-cells = <2>;
 152         #size-cells = <2>;
 153         i2s@fe410000 {
 154             compatible = "rockchip,rk3568-i2s-tdm";
 155             reg = <0x0 0xfe410000 0x0 0x1000>;
 156             interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
 157             clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>,
 158                      <&cru HCLK_I2S1_8CH>;
 159             clock-names = "mclk_tx", "mclk_rx", "hclk";
 160             dmas = <&dmac1 3>, <&dmac1 2>;
 161             dma-names = "rx", "tx";
 162             resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>;
 163             reset-names = "tx-m", "rx-m";
 164             rockchip,trcm-sync-tx-only;
 165             rockchip,grf = <&grf>;
 166             #sound-dai-cells = <0>;
 167             pinctrl-names = "default";
 168             pinctrl-0 =
 169                 <&i2s1m0_sclktx
 170                 &i2s1m0_sclkrx
 171                 &i2s1m0_lrcktx
 172                 &i2s1m0_lrckrx
 173                 &i2s1m0_sdi0
 174                 &i2s1m0_sdi1
 175                 &i2s1m0_sdi2
 176                 &i2s1m0_sdi3
 177                 &i2s1m0_sdo0
 178                 &i2s1m0_sdo1
 179                 &i2s1m0_sdo2
 180                 &i2s1m0_sdo3>;
 181         };
 182     };