1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 I2S Controller Device Tree Bindings
10 The Inter-IC Sound (I2S) controller implements full-duplex,
11 bi-directional and single direction point-to-point serial
12 interfaces. It can interface with I2S compatible devices.
13 I2S controller can operate both in master and slave mode.
16 - Jon Hunter <jonathanh@nvidia.com>
17 - Sameer Pujar <spujar@nvidia.com>
20 - $ref: name-prefix.yaml#
24 pattern: "^i2s@[0-9a-f]*$"
28 - const: nvidia,tegra210-i2s
34 - const: nvidia,tegra210-i2s
42 - description: I2S bit clock
44 Sync input clock, which can act as clock source to other I/O
45 modules in AHUB. The Tegra I2S driver sets this clock rate as
46 per bit clock rate. I/O module which wants to use this clock
47 as source, can mention this clock as parent in the DT bindings.
48 This is an optional clock entry, since it is only required when
49 some other I/O wants to reference from a particular I2Sx
62 assigned-clock-parents:
74 $ref: /schemas/graph.yaml#/properties/ports
77 $ref: audio-graph-port.yaml#
78 unevaluatedProperties: false
80 I2S ACIF (Audio Client Interface) port connected to the
81 corresponding AHUB (Audio Hub) ACIF port.
84 $ref: audio-graph-port.yaml#
85 unevaluatedProperties: false
87 I2S DAP (Digital Audio Port) interface which can be connected
88 to external audio codec for playback or capture.
96 - assigned-clock-parents
98 additionalProperties: false
102 #include<dt-bindings/clock/tegra210-car.h>
105 compatible = "nvidia,tegra210-i2s";
106 reg = <0x702d1000 0x100>;
107 clocks = <&tegra_car TEGRA210_CLK_I2S0>;
109 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
110 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
111 assigned-clock-rates = <1536000>;
112 sound-name-prefix = "I2S1";