1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/sound/microchip,sama7g5-i2smcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip I2S Multi-Channel Controller
10 - Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
13 The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and
14 supports a Time Division Multiplexed (TDM) interface with external
15 multi-channel audio codecs. It consists of a receiver, a transmitter and a
16 common clock generator that can be enabled separately to provide Adapter,
17 Client or Controller modes with receiver and/or transmitter active.
18 On later I2SMCC versions (starting with Microchip's SAMA7G5) I2S
19 multi-channel is supported by using multiple data pins, output and
28 - microchip,sam9x60-i2smcc
29 - microchip,sama7g5-i2smcc
39 - description: Peripheral Bus Clock
40 - description: Generic Clock (Optional). Should be set mostly when Master
52 - description: TX DMA Channel
53 - description: RX DMA Channel
60 microchip,tdm-data-pair:
62 Represents the DIN/DOUT pair pins that are used to receive/send
63 TDM data. It is optional and it is only needed if the controller
65 $ref: /schemas/types.yaml#/definitions/uint8
70 - $ref: dai-common.yaml#
74 const: microchip,sam9x60-i2smcc
77 microchip,tdm-data-pair: false
89 unevaluatedProperties: false
93 #include <dt-bindings/dma/at91.h>
94 #include <dt-bindings/interrupt-controller/arm-gic.h>
97 #sound-dai-cells = <0>;
98 compatible = "microchip,sam9x60-i2smcc";
99 reg = <0xf001c000 0x100>;
100 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
101 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
102 AT91_XDMAC_DT_PERID(36))>,
103 <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
104 AT91_XDMAC_DT_PERID(37))>;
105 dma-names = "tx", "rx";
106 clocks = <&i2s_clk>, <&i2s_gclk>;
107 clock-names = "pclk", "gclk";
108 pinctrl-names = "default";
109 pinctrl-0 = <&pinctrl_i2s_default>;