Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-formatters.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Amlogic Audio AXG TDM formatters
   8
   9 maintainers:
  10   - Jerome Brunet <jbrunet@baylibre.com>
  11
  12 properties:
  13   compatible:
  14     enum:
  15       - amlogic,g12a-tdmout
  16       - amlogic,sm1-tdmout
  17       - amlogic,axg-tdmout
  18       - amlogic,g12a-tdmin
  19       - amlogic,sm1-tdmin
  20       - amlogic,axg-tdmin
  21
  22   clocks:
  23     items:
  24       - description: Peripheral clock
  25       - description: Bit clock
  26       - description: Bit clock input multiplexer
  27       - description: Sample clock
  28       - description: Sample clock input multiplexer
  29
  30   clock-names:
  31     items:
  32       - const: pclk
  33       - const: sclk
  34       - const: sclk_sel
  35       - const: lrclk
  36       - const: lrclk_sel
  37
  38   reg:
  39     maxItems: 1
  40
  41   resets:
  42     maxItems: 1
  43
  44 required:
  45   - compatible
  46   - reg
  47   - clocks
  48   - clock-names
  49
  50 allOf:
  51   - $ref: component-common.yaml#
  52
  53   - if:
  54       properties:
  55         compatible:
  56           contains:
  57             enum:
  58               - amlogic,g12a-tdmin
  59               - amlogic,sm1-tdmin
  60               - amlogic,g12a-tdmout
  61               - amlogic,sm1-tdmout
  62     then:
  63       required:
  64         - resets
  65
  66     else:
  67       properties:
  68         resets: false
  69
  70 unevaluatedProperties: false
  71
  72 examples:
  73   - |
  74     #include <dt-bindings/clock/axg-audio-clkc.h>
  75     #include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
  76
  77     audio-controller@500 {
  78         compatible = "amlogic,g12a-tdmout";
  79         reg = <0x500 0x40>;
  80         resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
  81         clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
  82                  <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
  83                  <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
  84                  <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
  85                  <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
  86         clock-names = "pclk", "sclk", "sclk_sel",
  87                       "lrclk", "lrclk_sel";
  88     };