1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-dwc3-glue.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier SoC DWC3 USB3.0 glue layer
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
13 DWC3 USB3.0 glue layer implemented on Socionext UniPhier SoCs is
14 a sideband logic handling signals to DWC3 host controller inside
21 - socionext,uniphier-pro4-dwc3-glue
22 - socionext,uniphier-pro5-dwc3-glue
23 - socionext,uniphier-pxs2-dwc3-glue
24 - socionext,uniphier-ld20-dwc3-glue
25 - socionext,uniphier-pxs3-dwc3-glue
26 - socionext,uniphier-nx1-dwc3-glue
41 "^reset-controller@[0-9a-f]+$":
42 $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml#
44 "^regulator@[0-9a-f]+$":
45 $ref: /schemas/regulator/socionext,uniphier-regulator.yaml#
49 - $ref: /schemas/phy/socionext,uniphier-usb3hs-phy.yaml#
50 - $ref: /schemas/phy/socionext,uniphier-usb3ss-phy.yaml#
56 additionalProperties: false
61 compatible = "socionext,uniphier-ld20-dwc3-glue", "simple-mfd";
62 reg = <0x65b00000 0x400>;
65 ranges = <0 0x65b00000 0x400>;
68 compatible = "socionext,uniphier-ld20-usb3-reset";
72 clocks = <&sys_clk 14>;
74 resets = <&sys_rst 14>;
78 compatible = "socionext,uniphier-ld20-usb3-regulator";
81 clocks = <&sys_clk 14>;
83 resets = <&sys_rst 14>;
87 compatible = "socionext,uniphier-ld20-usb3-hsphy";
90 clock-names = "link", "phy";
91 clocks = <&sys_clk 14>, <&sys_clk 16>;
92 reset-names = "link", "phy";
93 resets = <&sys_rst 14>, <&sys_rst 16>;
97 compatible = "socionext,uniphier-ld20-usb3-ssphy";
100 clock-names = "link", "phy";
101 clocks = <&sys_clk 14>, <&sys_clk 18>;
102 reset-names = "link", "phy";
103 resets = <&sys_rst 14>, <&sys_rst 18>;