Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: "http://devicetree.org/schemas/soc/renesas/renesas,rzg2l-sysc.yaml#"
   5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
   6
   7 title: Renesas RZ/{G2L,V2L} System Controller (SYSC)
   8
   9 maintainers:
  10   - Geert Uytterhoeven <geert+renesas@glider.be>
  11
  12 description:
  13   The RZ/{G2L,V2L}-alike System Controller (SYSC) performs system control of
  14   the LSI and supports following functions,
  15   - External terminal state capture function
  16   - 34-bit address space access function
  17   - Low power consumption control
  18   - WDT stop control
  19
  20 properties:
  21   compatible:
  22     enum:
  23       - renesas,r9a07g043-sysc # RZ/G2UL and RZ/Five
  24       - renesas,r9a07g044-sysc # RZ/G2{L,LC}
  25       - renesas,r9a07g054-sysc # RZ/V2L
  26
  27   reg:
  28     maxItems: 1
  29
  30   interrupts:
  31     items:
  32       - description: CA55/CM33 Sleep/Software Standby Mode request interrupt
  33       - description: CA55 Software Standby Mode release request interrupt
  34       - description: CM33 Software Standby Mode release request interrupt
  35       - description: CA55 ACE Asynchronous Bridge Master/Slave interface deny request interrupt
  36
  37   interrupt-names:
  38     items:
  39       - const: lpm_int
  40       - const: ca55stbydone_int
  41       - const: cm33stbyr_int
  42       - const: ca55_deny
  43
  44 required:
  45   - compatible
  46   - reg
  47
  48 additionalProperties: false
  49
  50 examples:
  51   - |
  52     #include <dt-bindings/interrupt-controller/arm-gic.h>
  53
  54     sysc: system-controller@11020000 {
  55             compatible = "renesas,r9a07g044-sysc";
  56             reg = <0x11020000 0x10000>;
  57             interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
  58                          <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
  59                          <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
  60                          <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
  61             interrupt-names = "lpm_int", "ca55stbydone_int", "cm33stbyr_int",
  62                               "ca55_deny";
  63     };