1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/soc/mediatek/mediatek,pwrap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek PMIC Wrapper
10 - Flora Fu <flora.fu@mediatek.com>
11 - Alexandre Mergnat <amergnat@baylibre.com>
14 On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface
15 is not directly visible to the CPU, but only through the PMIC wrapper
16 inside the SoC. The communication between the SoC and the PMIC can
17 optionally be encrypted. Also a non standard Dual IO SPI mode can be
18 used to increase speed.
22 On MT8135 the pins of some SoC internal peripherals can be on the PMIC.
23 The signals of these pins are routed over the SPI bus using the pwrap
24 bridge. In the binding description below the properties needed for bridging
25 are marked with "IP Pairing". These are optional on SoCs which do not support
33 - mediatek,mt2701-pwrap
34 - mediatek,mt6765-pwrap
35 - mediatek,mt6779-pwrap
36 - mediatek,mt6795-pwrap
37 - mediatek,mt6797-pwrap
38 - mediatek,mt6873-pwrap
39 - mediatek,mt7622-pwrap
40 - mediatek,mt8135-pwrap
41 - mediatek,mt8173-pwrap
42 - mediatek,mt8183-pwrap
43 - mediatek,mt8186-pwrap
44 - mediatek,mt8195-pwrap
45 - mediatek,mt8365-pwrap
46 - mediatek,mt8516-pwrap
49 - mediatek,mt8186-pwrap
50 - mediatek,mt8195-pwrap
54 - mediatek,mt8188-pwrap
55 - const: mediatek,mt8195-pwrap
61 - description: PMIC wrapper registers
62 - description: IP pairing registers
76 - description: SPI bus clock
77 - description: Main module clock
78 - description: System module clock
79 - description: Timer module clock
92 - description: PMIC wrapper reset
93 - description: IP pairing reset
113 resets: [reset-names]
120 const: mediatek,mt8365-pwrap
129 additionalProperties: false
133 #include <dt-bindings/interrupt-controller/irq.h>
134 #include <dt-bindings/interrupt-controller/arm-gic.h>
135 #include <dt-bindings/reset/mt8135-resets.h>
138 #address-cells = <2>;
141 compatible = "mediatek,mt8135-pwrap";
142 reg = <0 0x1000f000 0 0x1000>,
143 <0 0x11017000 0 0x1000>;
144 reg-names = "pwrap", "pwrap-bridge";
145 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
146 clocks = <&clk26m>, <&clk26m>;
147 clock-names = "spi", "wrap";
148 resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>,
149 <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>;
150 reset-names = "pwrap", "pwrap-bridge";