1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MP HDMI blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the display pipeline
15 peripherals located in the HDMI domain of the SoC.
20 - const: fsl,imx8mp-hdmi-blk-ctrl
26 '#power-domain-cells':
72 additionalProperties: false
76 #include <dt-bindings/clock/imx8mp-clock.h>
77 #include <dt-bindings/power/imx8mp-power.h>
80 compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon";
81 reg = <0x32fc0000 0x23c>;
82 clocks = <&clk IMX8MP_CLK_HDMI_APB>,
83 <&clk IMX8MP_CLK_HDMI_ROOT>,
84 <&clk IMX8MP_CLK_HDMI_REF_266M>,
85 <&clk IMX8MP_CLK_HDMI_24M>;
86 clock-names = "apb", "axi", "ref_266m", "ref_24m";
87 power-domains = <&pgc_hdmimix>, <&pgc_hdmimix>, <&pgc_hdmimix>,
88 <&pgc_hdmimix>, <&pgc_hdmimix>, <&pgc_hdmimix>,
89 <&pgc_hdmimix>, <&pgc_hdmi_phy>;
90 power-domain-names = "bus", "irqsteer", "lcdif", "pai", "pvi", "trng",
91 "hdmi-tx", "hdmi-tx-phy";
92 #power-domain-cells = <1>;