1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/serial/sifive-serial.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SiFive asynchronous serial interface (UART)
10 - Pragnesh Patel <pragnesh.patel@sifive.com>
11 - Paul Walmsley <paul.walmsley@sifive.com>
12 - Palmer Dabbelt <palmer@sifive.com>
21 - sifive,fu540-c000-uart
22 - sifive,fu740-c000-uart
27 Should be something similar to "sifive,<chip>-uart"
28 for the UART as integrated on a particular chip,
29 and "sifive,uart<version>" for the general UART IP
30 block programming model.
32 UART HDL that corresponds to the IP block version
33 numbers can be found here -
35 https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/uart
52 unevaluatedProperties: false
56 #include <dt-bindings/clock/sifive-fu540-prci.h>
58 compatible = "sifive,fu540-c000-uart", "sifive,uart0";
59 interrupt-parent = <&plic0>;
61 reg = <0x10010000 0x1000>;
62 clocks = <&prci FU540_PRCI_CLK_TLCLK>;