1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
5 $id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
11 - Richard Genoud <richard.genoud@gmail.com>
17 - atmel,at91rm9200-usart
18 - atmel,at91sam9260-usart
20 - const: atmel,at91rm9200-dbgu
21 - const: atmel,at91rm9200-usart
23 - const: atmel,at91sam9260-dbgu
24 - const: atmel,at91sam9260-usart
26 - const: microchip,sam9x60-usart
27 - const: atmel,at91sam9260-usart
29 - const: microchip,sam9x60-dbgu
30 - const: microchip,sam9x60-usart
31 - const: atmel,at91sam9260-dbgu
32 - const: atmel,at91sam9260-usart
49 - description: USART Peripheral Clock
50 - description: USART Generic Clock
54 - description: TX DMA Channel
55 - description: RX DMA Channel
63 $ref: /schemas/types.yaml#/definitions/uint32
65 Must be either <AT91_USART_MODE_SPI> for SPI or
66 <AT91_USART_MODE_SERIAL> for USART (found in dt-bindings/mfd/at91-usart.h).
71 description: use of PDC or DMA for receiving data
75 description: use of PDC or DMA for transmitting data
78 $ref: /schemas/types.yaml#/definitions/uint32
80 Maximum number of data the RX and TX FIFOs can store for FIFO
99 - $ref: /schemas/spi/spi-controller.yaml#
102 atmel,use-dma-rx: false
104 atmel,use-dma-tx: false
106 atmel,fifo-size: false
120 - $ref: /schemas/serial/serial.yaml#
121 - $ref: /schemas/serial/rs485.yaml#
123 unevaluatedProperties: false
127 #include <dt-bindings/gpio/gpio.h>
128 #include <dt-bindings/interrupt-controller/irq.h>
129 #include <dt-bindings/mfd/at91-usart.h>
130 #include <dt-bindings/dma/at91.h>
133 usart0: serial@fff8c000 {
134 compatible = "atmel,at91sam9260-usart";
135 reg = <0xfff8c000 0x4000>;
136 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
138 clocks = <&usart0_clk>;
139 clock-names = "usart";
142 rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
143 cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
144 dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>;
145 dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>;
146 dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>;
147 rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>;
151 #include <dt-bindings/gpio/gpio.h>
152 #include <dt-bindings/interrupt-controller/irq.h>
153 #include <dt-bindings/mfd/at91-usart.h>
154 #include <dt-bindings/dma/at91.h>
157 usart1: serial@f001c000 {
158 compatible = "atmel,at91sam9260-usart";
159 reg = <0xf001c000 0x100>;
160 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
161 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
162 clocks = <&usart0_clk>;
163 clock-names = "usart";
166 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
167 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
168 dma-names = "tx", "rx";
169 atmel,fifo-size = <32>;
173 #include <dt-bindings/gpio/gpio.h>
174 #include <dt-bindings/interrupt-controller/irq.h>
175 #include <dt-bindings/mfd/at91-usart.h>
176 #include <dt-bindings/dma/at91.h>
180 compatible = "atmel,at91sam9260-usart";
181 reg = <0xf001c000 0x100>;
182 #address-cells = <1>;
184 atmel,usart-mode = <AT91_USART_MODE_SPI>;
185 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
186 clocks = <&usart0_clk>;
187 clock-names = "usart";
188 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
189 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
190 dma-names = "tx", "rx";
191 cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>;