Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 # Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
   3 %YAML 1.2
   4 ---
   5 $id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml#
   6 $schema: http://devicetree.org/meta-schemas/core.yaml#
   7
   8 title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
   9
  10 maintainers:
  11   - Richard Genoud <richard.genoud@gmail.com>
  12
  13 properties:
  14   compatible:
  15     oneOf:
  16       - enum:
  17           - atmel,at91rm9200-usart
  18           - atmel,at91sam9260-usart
  19           - microchip,sam9x60-usart
  20       - items:
  21           - const: atmel,at91rm9200-dbgu
  22           - const: atmel,at91rm9200-usart
  23       - items:
  24           - const: atmel,at91sam9260-dbgu
  25           - const: atmel,at91sam9260-usart
  26       - items:
  27           - const: microchip,sam9x60-dbgu
  28           - const: microchip,sam9x60-usart
  29           - const: atmel,at91sam9260-dbgu
  30           - const: atmel,at91sam9260-usart
  31
  32   reg:
  33     maxItems: 1
  34
  35   interrupts:
  36     maxItems: 1
  37
  38   clock-names:
  39     minItems: 1
  40     items:
  41       - const: usart
  42       - const: gclk
  43
  44   clocks:
  45     minItems: 1
  46     items:
  47       - description: USART Peripheral Clock
  48       - description: USART Generic Clock
  49
  50   dmas:
  51     items:
  52       - description: TX DMA Channel
  53       - description: RX DMA Channel
  54
  55   dma-names:
  56     items:
  57       - const: tx
  58       - const: rx
  59
  60   atmel,usart-mode:
  61     $ref: /schemas/types.yaml#/definitions/uint32
  62     description:
  63       Must be either <AT91_USART_MODE_SPI> for SPI or
  64       <AT91_USART_MODE_SERIAL> for USART (found in dt-bindings/mfd/at91-usart.h).
  65     enum: [ 0, 1 ]
  66
  67   atmel,use-dma-rx:
  68     type: boolean
  69     description: use of PDC or DMA for receiving data
  70
  71   atmel,use-dma-tx:
  72     type: boolean
  73     description: use of PDC or DMA for transmitting data
  74
  75   atmel,fifo-size:
  76     $ref: /schemas/types.yaml#/definitions/uint32
  77     description:
  78       Maximum number of data the RX and TX FIFOs can store for FIFO
  79       capable USARTS.
  80     enum: [ 16, 32 ]
  81
  82 required:
  83   - compatible
  84   - reg
  85   - interrupts
  86   - clock-names
  87   - clocks
  88   - atmel,usart-mode
  89
  90 allOf:
  91   - if:
  92       properties:
  93         atmel,usart-mode:
  94           const: 1
  95     then:
  96       allOf:
  97         - $ref: /schemas/spi/spi-controller.yaml#
  98
  99       properties:
 100         atmel,use-dma-rx: false
 101
 102         atmel,use-dma-tx: false
 103
 104         atmel,fifo-size: false
 105
 106         "#size-cells":
 107           const: 0
 108
 109         "#address-cells":
 110           const: 1
 111
 112       required:
 113         - "#size-cells"
 114         - "#address-cells"
 115
 116     else:
 117       allOf:
 118         - $ref: /schemas/serial/serial.yaml#
 119         - $ref: /schemas/serial/rs485.yaml#
 120
 121 unevaluatedProperties: false
 122
 123 examples:
 124   - |
 125     #include <dt-bindings/gpio/gpio.h>
 126     #include <dt-bindings/interrupt-controller/irq.h>
 127     #include <dt-bindings/mfd/at91-usart.h>
 128     #include <dt-bindings/dma/at91.h>
 129
 130     /* use PDC */
 131     usart0: serial@fff8c000 {
 132         compatible = "atmel,at91sam9260-usart";
 133         reg = <0xfff8c000 0x4000>;
 134         atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 135         interrupts = <7>;
 136         clocks = <&usart0_clk>;
 137         clock-names = "usart";
 138         atmel,use-dma-rx;
 139         atmel,use-dma-tx;
 140         rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
 141         cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
 142         dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>;
 143         dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>;
 144         dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>;
 145         rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>;
 146     };
 147
 148   - |
 149     #include <dt-bindings/gpio/gpio.h>
 150     #include <dt-bindings/interrupt-controller/irq.h>
 151     #include <dt-bindings/mfd/at91-usart.h>
 152     #include <dt-bindings/dma/at91.h>
 153
 154     /* use DMA */
 155     usart1: serial@f001c000 {
 156         compatible = "atmel,at91sam9260-usart";
 157         reg = <0xf001c000 0x100>;
 158         atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
 159         interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
 160         clocks = <&usart0_clk>;
 161         clock-names = "usart";
 162         atmel,use-dma-rx;
 163         atmel,use-dma-tx;
 164         dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
 165                <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
 166         dma-names = "tx", "rx";
 167         atmel,fifo-size = <32>;
 168     };
 169
 170   - |
 171     #include <dt-bindings/gpio/gpio.h>
 172     #include <dt-bindings/interrupt-controller/irq.h>
 173     #include <dt-bindings/mfd/at91-usart.h>
 174     #include <dt-bindings/dma/at91.h>
 175
 176     /* SPI mode */
 177     spi0: spi@f001c000 {
 178         compatible = "atmel,at91sam9260-usart";
 179         reg = <0xf001c000 0x100>;
 180         #address-cells = <1>;
 181         #size-cells = <0>;
 182         atmel,usart-mode = <AT91_USART_MODE_SPI>;
 183         interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
 184         clocks = <&usart0_clk>;
 185         clock-names = "usart";
 186         dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
 187                <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
 188         dma-names = "tx", "rx";
 189         cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>;
 190     };