1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
5 $id: http://devicetree.org/schemas/rtc/atmel,at91sam9260-rtt.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Atmel AT91 RTT Device Tree Bindings
14 - Alexandre Belloni <alexandre.belloni@bootlin.com>
20 - const: atmel,at91sam9260-rtt
22 - const: microchip,sam9x60-rtt
23 - const: atmel,at91sam9260-rtt
25 - const: microchip,sama7g5-rtt
26 - const: microchip,sam9x60-rtt
27 - const: atmel,at91sam9260-rtt
38 atmel,rtt-rtc-time-reg:
39 $ref: /schemas/types.yaml#/definitions/phandle-array
42 - description: Phandle to the GPBR node.
43 - description: Offset within the GPBR block.
45 Should encode the GPBR register used to store the time base when the
46 RTT is used as an RTC. The first cell should point to the GPBR node
47 and the second one encodes the offset within the GPBR block (or in
48 other words, the GPBR register used to store the time base).
55 - atmel,rtt-rtc-time-reg
57 unevaluatedProperties: false
61 #include <dt-bindings/interrupt-controller/irq.h>
64 compatible = "atmel,at91sam9260-rtt";
65 reg = <0xfffffd20 0x10>;
66 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
68 atmel,rtt-rtc-time-reg = <&gpbr 0x0>;