Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml

   1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/remoteproc/qcom,sdx55-pas.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm SDX55 Peripheral Authentication Service
   8
   9 maintainers:
  10   - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
  11
  12 description:
  13   Qualcomm SDX55 SoC Peripheral Authentication Service loads and boots firmware
  14   on the Qualcomm DSP Hexagon cores.
  15
  16 properties:
  17   compatible:
  18     enum:
  19       - qcom,sdx55-mpss-pas
  20
  21   reg:
  22     maxItems: 1
  23
  24   clocks:
  25     items:
  26       - description: XO clock
  27
  28   clock-names:
  29     items:
  30       - const: xo
  31
  32   interrupts:
  33     minItems: 6
  34
  35   interrupt-names:
  36     minItems: 6
  37
  38   power-domains:
  39     items:
  40       - description: CX power domain
  41       - description: MSS power domain
  42
  43   power-domain-names:
  44     items:
  45       - const: cx
  46       - const: mss
  47
  48   memory-region:
  49     maxItems: 1
  50     description: Reference to the reserved-memory for the Hexagon core
  51
  52   qcom,qmp:
  53     $ref: /schemas/types.yaml#/definitions/phandle
  54     description: Reference to the AOSS side-channel message RAM.
  55
  56   smd-edge: false
  57
  58   firmware-name:
  59     $ref: /schemas/types.yaml#/definitions/string
  60     description: Firmware name for the Hexagon core
  61
  62 required:
  63   - compatible
  64   - reg
  65   - memory-region
  66
  67 allOf:
  68   - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
  69
  70 unevaluatedProperties: false
  71
  72 examples:
  73   - |
  74     #include <dt-bindings/clock/qcom,rpmh.h>
  75     #include <dt-bindings/interrupt-controller/arm-gic.h>
  76     #include <dt-bindings/power/qcom-rpmpd.h>
  77
  78     remoteproc@4080000 {
  79         compatible = "qcom,sdx55-mpss-pas";
  80         reg = <0x04080000 0x4040>;
  81
  82         clocks = <&rpmhcc RPMH_CXO_CLK>;
  83         clock-names = "xo";
  84
  85         interrupts-extended = <&intc GIC_SPI 250 IRQ_TYPE_EDGE_RISING>,
  86                               <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
  87                               <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
  88                               <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
  89                               <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
  90                               <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
  91         interrupt-names = "wdog", "fatal", "ready", "handover",
  92                           "stop-ack", "shutdown-ack";
  93
  94         memory-region = <&mpss_adsp_mem>;
  95
  96         power-domains = <&rpmhpd SDX55_CX>, <&rpmhpd SDX55_MSS>;
  97         power-domain-names = "cx", "mss";
  98
  99         qcom,smem-states = <&modem_smp2p_out 0>;
 100         qcom,smem-state-names = "stop";
 101
 102         glink-edge {
 103             interrupts = <GIC_SPI 114 IRQ_TYPE_EDGE_RISING>;
 104             label = "mpss";
 105             mboxes = <&apcs 15>;
 106             qcom,remote-pid = <1>;
 107
 108             /* ... */
 109         };
 110     };