Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm SC7280 MSS Peripheral Image Loader
   8
   9 maintainers:
  10   - Sibi Sankar <quic_sibis@quicinc.com>
  11
  12 description:
  13   This document describes the hardware for a component that loads and boots firmware
  14   on the Qualcomm Technology Inc. SC7280 Modem Hexagon Core.
  15
  16 properties:
  17   compatible:
  18     enum:
  19       - qcom,sc7280-mss-pil
  20
  21   reg:
  22     items:
  23       - description: MSS QDSP6 registers
  24       - description: RMB registers
  25
  26   reg-names:
  27     items:
  28       - const: qdsp6
  29       - const: rmb
  30
  31   iommus:
  32     items:
  33       - description: MSA Stream 1
  34       - description: MSA Stream 2
  35
  36   interconnects:
  37     items:
  38       - description: Path leading to system memory
  39
  40   interrupts:
  41     items:
  42       - description: Watchdog interrupt
  43       - description: Fatal interrupt
  44       - description: Ready interrupt
  45       - description: Handover interrupt
  46       - description: Stop acknowledge interrupt
  47       - description: Shutdown acknowledge interrupt
  48
  49   interrupt-names:
  50     items:
  51       - const: wdog
  52       - const: fatal
  53       - const: ready
  54       - const: handover
  55       - const: stop-ack
  56       - const: shutdown-ack
  57
  58   clocks:
  59     items:
  60       - description: GCC MSS IFACE clock
  61       - description: GCC MSS OFFLINE clock
  62       - description: GCC MSS SNOC_AXI clock
  63       - description: RPMH PKA clock
  64       - description: RPMH XO clock
  65
  66   clock-names:
  67     items:
  68       - const: iface
  69       - const: offline
  70       - const: snoc_axi
  71       - const: pka
  72       - const: xo
  73
  74   power-domains:
  75     items:
  76       - description: CX power domain
  77       - description: MSS power domain
  78
  79   power-domain-names:
  80     items:
  81       - const: cx
  82       - const: mss
  83
  84   resets:
  85     items:
  86       - description: AOSS restart
  87       - description: PDC reset
  88
  89   reset-names:
  90     items:
  91       - const: mss_restart
  92       - const: pdc_reset
  93
  94   memory-region:
  95     items:
  96       - description: MBA reserved region
  97       - description: modem reserved region
  98
  99   firmware-name:
 100     $ref: /schemas/types.yaml#/definitions/string-array
 101     items:
 102       - description: Name of MBA firmware
 103       - description: Name of modem firmware
 104
 105   qcom,halt-regs:
 106     $ref: /schemas/types.yaml#/definitions/phandle-array
 107     description:
 108       Halt registers are used to halt transactions of various sub-components
 109       within MSS.
 110     items:
 111       - items:
 112           - description: phandle to TCSR_MUTEX registers
 113           - description: offset to the Q6 halt register
 114           - description: offset to the modem halt register
 115           - description: offset to the nc halt register
 116           - description: offset to the vq6 halt register
 117
 118   qcom,ext-regs:
 119     $ref: /schemas/types.yaml#/definitions/phandle-array
 120     description: EXT registers are used for various power related functionality
 121     items:
 122       - items:
 123           - description: phandle to TCSR_REG registers
 124           - description: offset to the force_clk_en register
 125           - description: offset to the rscc_disable register
 126       - items:
 127           - description: phandle to TCSR_MUTEX registers
 128           - description: offset to the axim1_clk_off register
 129           - description: offset to the crypto_clk_off register
 130
 131   qcom,qaccept-regs:
 132     $ref: /schemas/types.yaml#/definitions/phandle-array
 133     description: QACCEPT registers are used to bring up/down Q-channels
 134     items:
 135       - items:
 136           - description: phandle to TCSR_MUTEX registers
 137           - description: offset to the mdm qaccept register
 138           - description: offset to the cx qaccept register
 139           - description: offset to the axi qaccept register
 140
 141   qcom,qmp:
 142     $ref: /schemas/types.yaml#/definitions/phandle
 143     description: Reference to the AOSS side-channel message RAM.
 144
 145   qcom,smem-states:
 146     $ref: /schemas/types.yaml#/definitions/phandle-array
 147     description: States used by the AP to signal the Hexagon core
 148     items:
 149       - description: Stop the modem
 150
 151   qcom,smem-state-names:
 152     description: The names of the state bits used for SMP2P output
 153     const: stop
 154
 155   glink-edge:
 156     $ref: qcom,glink-edge.yaml#
 157     unevaluatedProperties: false
 158     description:
 159       Qualcomm G-Link subnode which represents communication edge, channels
 160       and devices related to the DSP.
 161
 162     properties:
 163       interrupts:
 164         items:
 165           - description: IRQ from MSS to GLINK
 166
 167       mboxes:
 168         items:
 169           - description: Mailbox for communication between APPS and MSS
 170
 171       label:
 172         const: modem
 173
 174       apr: false
 175       fastrpc: false
 176
 177 required:
 178   - compatible
 179   - reg
 180   - reg-names
 181   - iommus
 182   - interconnects
 183   - interrupts
 184   - interrupt-names
 185   - clocks
 186   - clock-names
 187   - power-domains
 188   - power-domain-names
 189   - resets
 190   - reset-names
 191   - qcom,halt-regs
 192   - qcom,ext-regs
 193   - qcom,qaccept-regs
 194   - memory-region
 195   - qcom,qmp
 196   - qcom,smem-states
 197   - qcom,smem-state-names
 198   - glink-edge
 199
 200 additionalProperties: false
 201
 202 examples:
 203   - |
 204     #include <dt-bindings/clock/qcom,gcc-sc7280.h>
 205     #include <dt-bindings/clock/qcom,rpmh.h>
 206     #include <dt-bindings/interconnect/qcom,sc7280.h>
 207     #include <dt-bindings/interrupt-controller/arm-gic.h>
 208     #include <dt-bindings/mailbox/qcom-ipcc.h>
 209     #include <dt-bindings/power/qcom-rpmpd.h>
 210     #include <dt-bindings/reset/qcom,sdm845-aoss.h>
 211     #include <dt-bindings/reset/qcom,sdm845-pdc.h>
 212
 213     remoteproc_mpss: remoteproc@4080000 {
 214         compatible = "qcom,sc7280-mss-pil";
 215         reg = <0x04080000 0x10000>, <0x04180000 0x48>;
 216         reg-names = "qdsp6", "rmb";
 217
 218         iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
 219
 220         interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
 221
 222         interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
 223                               <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
 224                               <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
 225                               <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
 226                               <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
 227                               <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
 228
 229         interrupt-names = "wdog", "fatal", "ready", "handover",
 230                           "stop-ack", "shutdown-ack";
 231
 232         clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
 233                  <&gcc GCC_MSS_OFFLINE_AXI_CLK>,
 234                  <&gcc GCC_MSS_SNOC_AXI_CLK>,
 235                  <&rpmhcc RPMH_PKA_CLK>,
 236                  <&rpmhcc RPMH_CXO_CLK>;
 237         clock-names = "iface", "offline", "snoc_axi", "pka", "xo";
 238
 239         power-domains = <&rpmhpd SC7280_CX>,
 240                         <&rpmhpd SC7280_MSS>;
 241         power-domain-names = "cx", "mss";
 242
 243         memory-region = <&mba_mem>, <&mpss_mem>;
 244
 245         qcom,qmp = <&aoss_qmp>;
 246
 247         qcom,smem-states = <&modem_smp2p_out 0>;
 248         qcom,smem-state-names = "stop";
 249
 250         resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
 251                  <&pdc_reset PDC_MODEM_SYNC_RESET>;
 252         reset-names = "mss_restart", "pdc_reset";
 253
 254         qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>;
 255         qcom,ext-regs = <&tcsr 0x10000 0x10004>, <&tcsr_mutex 0x26004 0x26008>;
 256         qcom,qaccept-regs = <&tcsr_mutex 0x23030 0x23040 0x23020>;
 257
 258         glink-edge {
 259             interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
 260                                    IPCC_MPROC_SIGNAL_GLINK_QMP
 261                                    IRQ_TYPE_EDGE_RISING>;
 262             mboxes = <&ipcc IPCC_CLIENT_MPSS
 263                       IPCC_MPROC_SIGNAL_GLINK_QMP>;
 264             label = "modem";
 265             qcom,remote-pid = <1>;
 266         };
 267     };