Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm SC7280 MSS Peripheral Image Loader
   8
   9 maintainers:
  10   - Sibi Sankar <quic_sibis@quicinc.com>
  11
  12 description:
  13   This document describes the hardware for a component that loads and boots firmware
  14   on the Qualcomm Technology Inc. SC7280 Modem Hexagon Core.
  15
  16 properties:
  17   compatible:
  18     enum:
  19       - qcom,sc7280-mss-pil
  20
  21   reg:
  22     items:
  23       - description: MSS QDSP6 registers
  24       - description: RMB registers
  25
  26   reg-names:
  27     items:
  28       - const: qdsp6
  29       - const: rmb
  30
  31   iommus:
  32     items:
  33       - description: MSA Stream 1
  34       - description: MSA Stream 2
  35
  36   interconnects:
  37     items:
  38       - description: Path leading to system memory
  39
  40   interrupts:
  41     items:
  42       - description: Watchdog interrupt
  43       - description: Fatal interrupt
  44       - description: Ready interrupt
  45       - description: Handover interrupt
  46       - description: Stop acknowledge interrupt
  47       - description: Shutdown acknowledge interrupt
  48
  49   interrupt-names:
  50     items:
  51       - const: wdog
  52       - const: fatal
  53       - const: ready
  54       - const: handover
  55       - const: stop-ack
  56       - const: shutdown-ack
  57
  58   clocks:
  59     items:
  60       - description: GCC MSS IFACE clock
  61       - description: GCC MSS OFFLINE clock
  62       - description: GCC MSS SNOC_AXI clock
  63       - description: RPMH PKA clock
  64       - description: RPMH XO clock
  65
  66   clock-names:
  67     items:
  68       - const: iface
  69       - const: offline
  70       - const: snoc_axi
  71       - const: pka
  72       - const: xo
  73
  74   power-domains:
  75     items:
  76       - description: CX power domain
  77       - description: MSS power domain
  78
  79   power-domain-names:
  80     items:
  81       - const: cx
  82       - const: mss
  83
  84   resets:
  85     items:
  86       - description: AOSS restart
  87       - description: PDC reset
  88
  89   reset-names:
  90     items:
  91       - const: mss_restart
  92       - const: pdc_reset
  93
  94   memory-region:
  95     items:
  96       - description: MBA reserved region
  97       - description: modem reserved region
  98       - description: metadata reserved region
  99
 100   firmware-name:
 101     $ref: /schemas/types.yaml#/definitions/string-array
 102     items:
 103       - description: Name of MBA firmware
 104       - description: Name of modem firmware
 105
 106   qcom,halt-regs:
 107     $ref: /schemas/types.yaml#/definitions/phandle-array
 108     description:
 109       Halt registers are used to halt transactions of various sub-components
 110       within MSS.
 111     items:
 112       - items:
 113           - description: phandle to TCSR_MUTEX registers
 114           - description: offset to the Q6 halt register
 115           - description: offset to the modem halt register
 116           - description: offset to the nc halt register
 117           - description: offset to the vq6 halt register
 118
 119   qcom,ext-regs:
 120     $ref: /schemas/types.yaml#/definitions/phandle-array
 121     description: EXT registers are used for various power related functionality
 122     items:
 123       - items:
 124           - description: phandle to TCSR_REG registers
 125           - description: offset to the force_clk_en register
 126           - description: offset to the rscc_disable register
 127       - items:
 128           - description: phandle to TCSR_MUTEX registers
 129           - description: offset to the axim1_clk_off register
 130           - description: offset to the crypto_clk_off register
 131
 132   qcom,qaccept-regs:
 133     $ref: /schemas/types.yaml#/definitions/phandle-array
 134     description: QACCEPT registers are used to bring up/down Q-channels
 135     items:
 136       - items:
 137           - description: phandle to TCSR_MUTEX registers
 138           - description: offset to the mdm qaccept register
 139           - description: offset to the cx qaccept register
 140           - description: offset to the axi qaccept register
 141
 142   qcom,qmp:
 143     $ref: /schemas/types.yaml#/definitions/phandle
 144     description: Reference to the AOSS side-channel message RAM.
 145
 146   qcom,smem-states:
 147     $ref: /schemas/types.yaml#/definitions/phandle-array
 148     description: States used by the AP to signal the Hexagon core
 149     items:
 150       - description: Stop the modem
 151
 152   qcom,smem-state-names:
 153     description: The names of the state bits used for SMP2P output
 154     const: stop
 155
 156   glink-edge:
 157     $ref: qcom,glink-edge.yaml#
 158     unevaluatedProperties: false
 159     description:
 160       Qualcomm G-Link subnode which represents communication edge, channels
 161       and devices related to the DSP.
 162
 163     properties:
 164       interrupts:
 165         items:
 166           - description: IRQ from MSS to GLINK
 167
 168       mboxes:
 169         items:
 170           - description: Mailbox for communication between APPS and MSS
 171
 172       label:
 173         const: modem
 174
 175       apr: false
 176       fastrpc: false
 177
 178 required:
 179   - compatible
 180   - reg
 181   - reg-names
 182   - iommus
 183   - interconnects
 184   - interrupts
 185   - interrupt-names
 186   - clocks
 187   - clock-names
 188   - power-domains
 189   - power-domain-names
 190   - resets
 191   - reset-names
 192   - qcom,halt-regs
 193   - qcom,ext-regs
 194   - qcom,qaccept-regs
 195   - memory-region
 196   - qcom,qmp
 197   - qcom,smem-states
 198   - qcom,smem-state-names
 199   - glink-edge
 200
 201 additionalProperties: false
 202
 203 examples:
 204   - |
 205     #include <dt-bindings/clock/qcom,gcc-sc7280.h>
 206     #include <dt-bindings/clock/qcom,rpmh.h>
 207     #include <dt-bindings/interconnect/qcom,sc7280.h>
 208     #include <dt-bindings/interrupt-controller/arm-gic.h>
 209     #include <dt-bindings/mailbox/qcom-ipcc.h>
 210     #include <dt-bindings/power/qcom-rpmpd.h>
 211     #include <dt-bindings/reset/qcom,sdm845-aoss.h>
 212     #include <dt-bindings/reset/qcom,sdm845-pdc.h>
 213
 214     remoteproc_mpss: remoteproc@4080000 {
 215         compatible = "qcom,sc7280-mss-pil";
 216         reg = <0x04080000 0x10000>, <0x04180000 0x48>;
 217         reg-names = "qdsp6", "rmb";
 218
 219         iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
 220
 221         interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
 222
 223         interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
 224                               <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
 225                               <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
 226                               <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
 227                               <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
 228                               <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
 229
 230         interrupt-names = "wdog", "fatal", "ready", "handover",
 231                           "stop-ack", "shutdown-ack";
 232
 233         clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
 234                  <&gcc GCC_MSS_OFFLINE_AXI_CLK>,
 235                  <&gcc GCC_MSS_SNOC_AXI_CLK>,
 236                  <&rpmhcc RPMH_PKA_CLK>,
 237                  <&rpmhcc RPMH_CXO_CLK>;
 238         clock-names = "iface", "offline", "snoc_axi", "pka", "xo";
 239
 240         power-domains = <&rpmhpd SC7280_CX>,
 241                         <&rpmhpd SC7280_MSS>;
 242         power-domain-names = "cx", "mss";
 243
 244         memory-region = <&mba_mem>, <&mpss_mem>, <&mdata_mem>;
 245
 246         qcom,qmp = <&aoss_qmp>;
 247
 248         qcom,smem-states = <&modem_smp2p_out 0>;
 249         qcom,smem-state-names = "stop";
 250
 251         resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
 252                  <&pdc_reset PDC_MODEM_SYNC_RESET>;
 253         reset-names = "mss_restart", "pdc_reset";
 254
 255         qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>;
 256         qcom,ext-regs = <&tcsr 0x10000 0x10004>, <&tcsr_mutex 0x26004 0x26008>;
 257         qcom,qaccept-regs = <&tcsr_mutex 0x23030 0x23040 0x23020>;
 258
 259         glink-edge {
 260             interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
 261                                    IPCC_MPROC_SIGNAL_GLINK_QMP
 262                                    IRQ_TYPE_EDGE_RISING>;
 263             mboxes = <&ipcc IPCC_CLIENT_MPSS
 264                       IPCC_MPROC_SIGNAL_GLINK_QMP>;
 265             label = "modem";
 266             qcom,remote-pid = <1>;
 267         };
 268     };