1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QCS404 Peripheral Authentication Service
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
13 Qualcomm QCS404 SoC Peripheral Authentication Service loads and boots
14 firmware on the Qualcomm DSP Hexagon cores.
19 - qcom,qcs404-adsp-pas
20 - qcom,qcs404-cdsp-pas
21 - qcom,qcs404-wcss-pas
28 - description: XO clock
41 power-domain-names: false
46 description: Reference to the reserved-memory for the Hexagon core
49 $ref: /schemas/types.yaml#/definitions/string
50 description: Firmware name for the Hexagon core
58 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
60 unevaluatedProperties: false
64 #include <dt-bindings/interrupt-controller/arm-gic.h>
65 #include <dt-bindings/interrupt-controller/irq.h>
68 compatible = "qcom,qcs404-adsp-pas";
69 reg = <0x0c700000 0x4040>;
74 interrupts-extended = <&intc GIC_SPI 293 IRQ_TYPE_EDGE_RISING>,
75 <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
76 <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
77 <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
78 <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
79 interrupt-names = "wdog", "fatal", "ready",
80 "handover", "stop-ack";
82 memory-region = <&adsp_fw_mem>;
84 qcom,smem-states = <&adsp_smp2p_out 0>;
85 qcom,smem-state-names = "stop";
88 interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
90 qcom,remote-pid = <2>;
91 mboxes = <&apcs_glb 8>;