1 * Freescale QorIQ 1588 timer based PTP clock
5 - compatible Should be "fsl,etsec-ptp" for eTSEC
6 Should be "fsl,fman-ptp-timer" for DPAA FMan
7 - reg Offset and length of the register set for the device
8 - interrupts There should be at least two interrupts. Some devices
9 have as many as four PTP related interrupts.
13 - fsl,cksel Timer reference clock source.
14 - fsl,tclk-period Timer reference clock period in nanoseconds.
15 - fsl,tmr-prsc Prescaler, divides the output clock.
16 - fsl,tmr-add Frequency compensation value.
17 - fsl,tmr-fiper1 Fixed interval period pulse generator.
18 - fsl,tmr-fiper2 Fixed interval period pulse generator.
19 - fsl,max-adj Maximum frequency adjustment in parts per billion.
21 These properties set the operational parameters for the PTP
22 clock. You must choose these carefully for the clock to work right.
23 Here is how to figure good values:
25 TimerOsc = selected reference clock MHz
26 tclk_period = desired clock period nanoseconds
27 NominalFreq = 1000 / tclk_period MHz
28 FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
29 tmr_add = ceil(2^32 / FreqDivRatio)
30 OutputClock = NominalFreq / tmr_prsc MHz
31 PulseWidth = 1 / OutputClock microseconds
32 FiperFreq1 = desired frequency in Hz
33 FiperDiv1 = 1000000 * OutputClock / FiperFreq1
34 tmr_fiper1 = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
35 max_adj = 1000000000 * (FreqDivRatio - 1.0) - 1
37 The calculation for tmr_fiper2 is the same as for tmr_fiper1. The
38 driver expects that tmr_fiper1 will be correctly set to produce a 1
39 Pulse Per Second (PPS) signal, since this will be offered to the PPS
40 subsystem to synchronize the Linux clock.
42 Reference clock source is determined by the value, which is holded
43 in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the
44 value, which will be directly written in those bits, that is why,
45 according to reference manual, the next clock sources can be used:
48 <0> - external high precision timer reference clock (TSEC_TMR_CLK
49 input is used for this purpose);
50 <1> - eTSEC system clock;
51 <2> - eTSEC1 transmit clock;
52 <3> - RTC clock input.
55 <0> - external high precision timer reference clock (TMR_1588_CLK)
56 <1> - MAC system clock (1/2 FMan clock)
58 <3> - RTC clock oscillator
60 When this attribute is not used, the IEEE 1588 timer reference clock
61 will use the eTSEC system clock (for Gianfar) or the MAC system
67 compatible = "fsl,etsec-ptp";
69 interrupts = <12 0x8 13 0x8>;
70 interrupt-parent = < &ipic >;
72 fsl,tclk-period = <10>;
74 fsl,tmr-add = <0x999999A4>;
75 fsl,tmr-fiper1 = <0x3B9AC9F6>;
76 fsl,tmr-fiper2 = <0x00018696>;
77 fsl,max-adj = <659999998>;